564d47db9e
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783). - Minor corrections and improvements.
21 lines
669 B
ReStructuredText
21 lines
669 B
ReStructuredText
..
|
|
**************************************************
|
|
* *
|
|
* Automatically generated file, do not edit! *
|
|
* *
|
|
**************************************************
|
|
|
|
.. _amdgpu_synid_gfx8_vdst_dfa6da:
|
|
|
|
vdst
|
|
====
|
|
|
|
Image data to be loaded by an image instruction.
|
|
|
|
*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
|
|
|
|
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies 1 dword.
|
|
* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
|
|
|
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|