0d0018e709
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable VOP3 variants of dot2c/dot4c/dot8c instructions (https://reviews.llvm.org/D138494). - Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable abs and neg modifiers for v_dot2c_f32_f16_dpp. - Minor corrections and improvements.
18 lines
537 B
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18 lines
537 B
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid_gfx90a_sbase_b0aa25:
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sbase
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=====
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A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size, and a stride.
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*Size:* 4 dwords.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`
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