d8ac03f15e
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783). - Enable image_gather4h (https://reviews.llvm.org/D130764). - Minor corrections and improvements.
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.. _amdgpu_synid_gfx9_vaddr_cc213c:
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vaddr
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=====
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Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
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*Size:* 1-12 dwords. Actual size depends on opcode, specific image being handled and :ref:`a16<amdgpu_synid_a16>`.
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Note. Image format and dimensions are encoded in the image resource constant, but not in the instruction.
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*Operands:* :ref:`v<amdgpu_synid_v>`
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