a57847232f
The tests in this directory all depend on the AMDGPU target being present so we can let opt infer the data layout. Reviewed By: arsenm Pull Request: https://github.com/llvm/llvm-project/pull/137924
21 lines
1.1 KiB
LLVM
21 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -aa-pipeline=basic-aa -passes='function(load-store-vectorizer)' -S -o - %s | FileCheck %s
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define { float, float } @f() {
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; CHECK-LABEL: define { float, float } @f() {
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[L1:%.*]] = load float, ptr addrspace(7) null, align 4
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; CHECK-NEXT: [[L2:%.*]] = load float, ptr addrspace(7) getelementptr (i8, ptr addrspace(7) null, i64 24), align 4
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; CHECK-NEXT: [[IV1:%.*]] = insertvalue { float, float } zeroinitializer, float [[L1]], 0
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; CHECK-NEXT: [[IV2:%.*]] = insertvalue { float, float } [[IV1]], float [[L2]], 1
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; CHECK-NEXT: ret { float, float } [[IV2]]
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;
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bb:
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%l1 = load float, ptr addrspace(7) null
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%l2 = load float, ptr addrspace(7) getelementptr (i8, ptr addrspace(7) null, i64 24)
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%iv1 = insertvalue { float, float } zeroinitializer, float %l1, 0
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%iv2 = insertvalue { float, float } %iv1, float %l2, 1
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ret { float, float } %iv2
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}
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