5fad05e80d
Follow-up of D72172 and D72180
This patch passes `uint64_t Address` to print methods of PC-relative
operands so that subsequent target specific patches can change
`*InstPrinter::print{Operand,PCRelImm,...}` to customize the output.
Add MCInstPrinter::PrintBranchImmAsAddress which is set to true by
llvm-objdump.
```
// Current llvm-objdump -d output
aarch64: 20000: bl #0
ppc: 20000: bl .+4
x86: 20000: callq 0
// Ideal output
aarch64: 20000: bl 0x20000
ppc: 20000: bl 0x20004
x86: 20000: callq 0x20005
// GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled
aarch64: 20000: bl 20000
ppc: 20000: bl 0x20004
x86: 20000: callq 20005
```
In `lib/Target/X86/X86GenAsmWriter1.inc` (generated by `llvm-tblgen -gen-asm-writer`):
```
case 12:
// CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JCXZ, JECXZ, J...
- printPCRelImm(MI, 0, O);
+ printPCRelImm(MI, Address, 0, O);
return;
```
Some targets have 2 `printOperand` overloads, one without `Address` and
one with `Address`. They should annotate derived `Operand` properly with
`let OperandType = "OPERAND_PCREL"`.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D76574
87 lines
3.8 KiB
C++
87 lines
3.8 KiB
C++
//==- SystemZInstPrinter.h - Convert SystemZ MCInst to assembly --*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints a SystemZ MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZINSTPRINTER_H
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#define LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZINSTPRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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#include <cstdint>
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namespace llvm {
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class MCOperand;
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class SystemZInstPrinter : public MCInstPrinter {
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public:
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SystemZInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
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const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI) {}
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// Automatically generated by tblgen.
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void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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// Print an address with the given base, displacement and index.
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static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
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raw_ostream &O);
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// Print the given operand.
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static void printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
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raw_ostream &O);
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// Override MCInstPrinter.
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void printRegName(raw_ostream &O, unsigned RegNo) const override;
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void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
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const MCSubtargetInfo &STI, raw_ostream &O) override;
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private:
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// Print various types of operand.
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void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum,
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raw_ostream &O) {
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printOperand(MI, OpNum, O);
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}
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void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU12ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU48ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, uint64_t /*Address*/, int OpNum,
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raw_ostream &O) {
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printPCRelOperand(MI, OpNum, O);
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}
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void printPCRelTLSOperand(const MCInst *MI, uint64_t Address, int OpNum,
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raw_ostream &O);
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// Print the mnemonic for a condition-code mask ("ne", "lh", etc.)
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// This forms part of the instruction name rather than the operand list.
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void printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O);
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_SYSTEMZ_MCTARGETDESC_SYSTEMZINSTPRINTER_H
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