Reapply r346374 with the fixes for modules build. Original summary: This change implements assembler parser, code emitter, ELF object writer and disassembler for the MSP430 ISA. Also, more instruction forms are added to the target description. Patch by Michael Skvortsov! llvm-svn: 346948
70 lines
1.6 KiB
LLVM
70 lines
1.6 KiB
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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@foo = common global i16 0, align 2
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@bar = common global i16 0, align 2
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define void @mov() nounwind {
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; CHECK-LABEL: mov:
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; CHECK: mov &bar, &foo
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%1 = load i16, i16* @bar
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store i16 %1, i16* @foo
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ret void
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}
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define void @add() nounwind {
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; CHECK-LABEL: add:
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; CHECK: add &bar, &foo
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%1 = load i16, i16* @bar
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%2 = load i16, i16* @foo
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%3 = add i16 %2, %1
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store i16 %3, i16* @foo
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ret void
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}
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define void @and() nounwind {
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; CHECK-LABEL: and:
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; CHECK: and &bar, &foo
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%1 = load i16, i16* @bar
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%2 = load i16, i16* @foo
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%3 = and i16 %2, %1
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store i16 %3, i16* @foo
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ret void
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}
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define void @bis() nounwind {
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; CHECK-LABEL: bis:
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; CHECK: bis &bar, &foo
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%1 = load i16, i16* @bar
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%2 = load i16, i16* @foo
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%3 = or i16 %2, %1
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store i16 %3, i16* @foo
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ret void
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}
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define void @xor() nounwind {
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; CHECK-LABEL: xor:
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; CHECK: xor &bar, &foo
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%1 = load i16, i16* @bar
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%2 = load i16, i16* @foo
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%3 = xor i16 %2, %1
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store i16 %3, i16* @foo
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ret void
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}
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define i16 @mov2() nounwind {
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entry:
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%retval = alloca i16 ; <i16*> [#uses=3]
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%x = alloca i32, align 2 ; <i32*> [#uses=1]
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%y = alloca i32, align 2 ; <i32*> [#uses=1]
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store i16 0, i16* %retval
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%tmp = load i32, i32* %y ; <i32> [#uses=1]
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store i32 %tmp, i32* %x
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store i16 0, i16* %retval
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%0 = load i16, i16* %retval ; <i16> [#uses=1]
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ret i16 %0
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; CHECK-LABEL: mov2:
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; CHECK-DAG: mov 2(r1), 6(r1)
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; CHECK-DAG: mov 0(r1), 4(r1)
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}
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