This is not a correctness fix because the set is only used for debug output. However, it helps avoid noise when looking at diffs between compiler runs. The set is only maintained with debug output enabled, so the added cost should be acceptable. Differential Revision: https://reviews.llvm.org/D139465
167 lines
5.7 KiB
C++
167 lines
5.7 KiB
C++
//===-- lib/CodeGen/GlobalISel/Combiner.cpp -------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file constains common code to combine machine functions at generic
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// level.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/Combiner.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
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#include "llvm/CodeGen/GlobalISel/CSEMIRBuilder.h"
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#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
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#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
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#include "llvm/CodeGen/GlobalISel/GISelWorkList.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
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#include "llvm/Support/Debug.h"
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#define DEBUG_TYPE "gi-combiner"
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using namespace llvm;
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namespace llvm {
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cl::OptionCategory GICombinerOptionCategory(
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"GlobalISel Combiner",
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"Control the rules which are enabled. These options all take a comma "
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"separated list of rules to disable and may be specified by number "
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"or number range (e.g. 1-10)."
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#ifndef NDEBUG
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" They may also be specified by name."
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#endif
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);
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} // end namespace llvm
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namespace {
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/// This class acts as the glue the joins the CombinerHelper to the overall
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/// Combine algorithm. The CombinerHelper is intended to report the
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/// modifications it makes to the MIR to the GISelChangeObserver and the
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/// observer subclass will act on these events. In this case, instruction
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/// erasure will cancel any future visits to the erased instruction and
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/// instruction creation will schedule that instruction for a future visit.
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/// Other Combiner implementations may require more complex behaviour from
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/// their GISelChangeObserver subclass.
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class WorkListMaintainer : public GISelChangeObserver {
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using WorkListTy = GISelWorkList<512>;
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WorkListTy &WorkList;
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/// The instructions that have been created but we want to report once they
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/// have their operands. This is only maintained if debug output is requested.
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#ifndef NDEBUG
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SetVector<const MachineInstr *> CreatedInstrs;
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#endif
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public:
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WorkListMaintainer(WorkListTy &WorkList) : WorkList(WorkList) {}
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virtual ~WorkListMaintainer() = default;
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void erasingInstr(MachineInstr &MI) override {
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LLVM_DEBUG(dbgs() << "Erasing: " << MI << "\n");
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WorkList.remove(&MI);
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}
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void createdInstr(MachineInstr &MI) override {
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LLVM_DEBUG(dbgs() << "Creating: " << MI << "\n");
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WorkList.insert(&MI);
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LLVM_DEBUG(CreatedInstrs.insert(&MI));
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}
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void changingInstr(MachineInstr &MI) override {
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LLVM_DEBUG(dbgs() << "Changing: " << MI << "\n");
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WorkList.insert(&MI);
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}
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void changedInstr(MachineInstr &MI) override {
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LLVM_DEBUG(dbgs() << "Changed: " << MI << "\n");
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WorkList.insert(&MI);
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}
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void reportFullyCreatedInstrs() {
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LLVM_DEBUG(for (const auto *MI
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: CreatedInstrs) {
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dbgs() << "Created: ";
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MI->print(dbgs());
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});
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LLVM_DEBUG(CreatedInstrs.clear());
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}
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};
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}
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Combiner::Combiner(CombinerInfo &Info, const TargetPassConfig *TPC)
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: CInfo(Info), TPC(TPC) {
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(void)this->TPC; // FIXME: Remove when used.
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}
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bool Combiner::combineMachineInstrs(MachineFunction &MF,
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GISelCSEInfo *CSEInfo) {
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// If the ISel pipeline failed, do not bother running this pass.
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// FIXME: Should this be here or in individual combiner passes.
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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Builder =
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CSEInfo ? std::make_unique<CSEMIRBuilder>() : std::make_unique<MachineIRBuilder>();
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MRI = &MF.getRegInfo();
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Builder->setMF(MF);
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if (CSEInfo)
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Builder->setCSEInfo(CSEInfo);
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LLVM_DEBUG(dbgs() << "Generic MI Combiner for: " << MF.getName() << '\n');
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MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
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bool MFChanged = false;
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bool Changed;
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MachineIRBuilder &B = *Builder;
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do {
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// Collect all instructions. Do a post order traversal for basic blocks and
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// insert with list bottom up, so while we pop_back_val, we'll traverse top
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// down RPOT.
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Changed = false;
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GISelWorkList<512> WorkList;
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WorkListMaintainer Observer(WorkList);
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GISelObserverWrapper WrapperObserver(&Observer);
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if (CSEInfo)
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WrapperObserver.addObserver(CSEInfo);
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RAIIDelegateInstaller DelInstall(MF, &WrapperObserver);
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for (MachineBasicBlock *MBB : post_order(&MF)) {
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for (MachineInstr &CurMI :
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llvm::make_early_inc_range(llvm::reverse(*MBB))) {
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// Erase dead insts before even adding to the list.
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if (isTriviallyDead(CurMI, *MRI)) {
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LLVM_DEBUG(dbgs() << CurMI << "Is dead; erasing.\n");
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llvm::salvageDebugInfo(*MRI, CurMI);
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CurMI.eraseFromParent();
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continue;
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}
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WorkList.deferred_insert(&CurMI);
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}
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}
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WorkList.finalize();
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// Main Loop. Process the instructions here.
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while (!WorkList.empty()) {
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MachineInstr *CurrInst = WorkList.pop_back_val();
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LLVM_DEBUG(dbgs() << "\nTry combining " << *CurrInst;);
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Changed |= CInfo.combine(WrapperObserver, *CurrInst, B);
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Observer.reportFullyCreatedInstrs();
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}
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MFChanged |= Changed;
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} while (Changed);
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#ifndef NDEBUG
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if (CSEInfo) {
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if (auto E = CSEInfo->verify()) {
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errs() << E << '\n';
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assert(false && "CSEInfo is not consistent. Likely missing calls to "
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"observer on mutations.");
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}
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}
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#endif
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return MFChanged;
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}
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