D25618 added a method to verify the instruction predicates for an emitted instruction, through verifyInstructionPredicates added into <Target>MCCodeEmitter::encodeInstruction. This is a very useful idea, but the implementation inside MCCodeEmitter made it only fire for object files, not assembly which most of the llvm test suite uses. This patch moves the code into the <Target>_MC::verifyInstructionPredicates method, inside the InstrInfo. The allows it to be called from other places, such as in this patch where it is called from the <Target>AsmPrinter::emitInstruction methods which should trigger for both assembly and object files. It can also be called from other places such as verifyInstruction, but that is not done here (it tends to catch errors earlier, but in reality just shows all the mir tests that have incorrect feature predicates). The interface was also simplified slightly, moving computeAvailableFeatures into the function so that it does not need to be called externally. The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently show errors in the test-suite, so have been disabled with FIXME comments. Recommitted with some fixes for the leftover MCII variables in release builds. Differential Revision: https://reviews.llvm.org/D129506
246 lines
8.3 KiB
C++
246 lines
8.3 KiB
C++
//===-- LanaiAsmPrinter.cpp - Lanai LLVM assembly writer ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to the Lanai assembly language.
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//
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//===----------------------------------------------------------------------===//
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#include "LanaiAluCode.h"
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#include "LanaiCondCode.h"
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#include "LanaiInstrInfo.h"
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#include "LanaiMCInstLower.h"
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#include "LanaiTargetMachine.h"
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#include "MCTargetDesc/LanaiInstPrinter.h"
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#include "TargetInfo/LanaiTargetInfo.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Mangler.h"
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#include "llvm/IR/Module.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstBuilder.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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#define DEBUG_TYPE "asm-printer"
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using namespace llvm;
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namespace {
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class LanaiAsmPrinter : public AsmPrinter {
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public:
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explicit LanaiAsmPrinter(TargetMachine &TM,
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std::unique_ptr<MCStreamer> Streamer)
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: AsmPrinter(TM, std::move(Streamer)) {}
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StringRef getPassName() const override { return "Lanai Assembly Printer"; }
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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const char *ExtraCode, raw_ostream &O) override;
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void emitInstruction(const MachineInstr *MI) override;
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bool isBlockOnlyReachableByFallthrough(
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const MachineBasicBlock *MBB) const override;
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private:
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void customEmitInstruction(const MachineInstr *MI);
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void emitCallInstruction(const MachineInstr *MI);
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};
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} // end of anonymous namespace
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void LanaiAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNum);
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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O << LanaiInstPrinter::getRegisterName(MO.getReg());
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break;
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case MachineOperand::MO_Immediate:
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O << MO.getImm();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol();
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break;
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case MachineOperand::MO_GlobalAddress:
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O << *getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_BlockAddress: {
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MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
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O << BA->getName();
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break;
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}
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case MachineOperand::MO_ExternalSymbol:
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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break;
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case MachineOperand::MO_JumpTableIndex:
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O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_'
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<< MO.getIndex();
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
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<< MO.getIndex();
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return;
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default:
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llvm_unreachable("<unknown operand type>");
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}
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}
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// PrintAsmOperand - Print out an operand for an inline asm expression.
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bool LanaiAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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const char *ExtraCode, raw_ostream &O) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1])
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return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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// The highest-numbered register of a pair.
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case 'H': {
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if (OpNo == 0)
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return true;
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const MachineOperand &FlagsOP = MI->getOperand(OpNo - 1);
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if (!FlagsOP.isImm())
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return true;
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unsigned Flags = FlagsOP.getImm();
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unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
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if (NumVals != 2)
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return true;
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unsigned RegOp = OpNo + 1;
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if (RegOp >= MI->getNumOperands())
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return true;
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const MachineOperand &MO = MI->getOperand(RegOp);
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if (!MO.isReg())
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return true;
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Register Reg = MO.getReg();
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O << LanaiInstPrinter::getRegisterName(Reg);
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return false;
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}
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default:
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return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
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}
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}
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printOperand(MI, OpNo, O);
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return false;
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}
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//===----------------------------------------------------------------------===//
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void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
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assert((MI->getOpcode() == Lanai::CALL || MI->getOpcode() == Lanai::CALLR) &&
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"Unsupported call function");
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LanaiMCInstLower MCInstLowering(OutContext, *this);
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MCSubtargetInfo STI = getSubtargetInfo();
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// Insert save rca instruction immediately before the call.
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// TODO: We should generate a pc-relative mov instruction here instead
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// of pc + 16 (should be mov .+16 %rca).
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OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_I_LO)
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.addReg(Lanai::RCA)
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.addReg(Lanai::PC)
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.addImm(16),
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STI);
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// Push rca onto the stack.
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// st %rca, [--%sp]
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OutStreamer->emitInstruction(MCInstBuilder(Lanai::SW_RI)
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.addReg(Lanai::RCA)
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.addReg(Lanai::SP)
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.addImm(-4)
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.addImm(LPAC::makePreOp(LPAC::ADD)),
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STI);
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// Lower the call instruction.
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if (MI->getOpcode() == Lanai::CALL) {
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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TmpInst.setOpcode(Lanai::BT);
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OutStreamer->emitInstruction(TmpInst, STI);
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} else {
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OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_R)
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.addReg(Lanai::PC)
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.addReg(MI->getOperand(0).getReg())
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.addReg(Lanai::R0)
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.addImm(LPCC::ICC_T),
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STI);
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}
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}
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void LanaiAsmPrinter::customEmitInstruction(const MachineInstr *MI) {
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LanaiMCInstLower MCInstLowering(OutContext, *this);
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MCSubtargetInfo STI = getSubtargetInfo();
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MCInst TmpInst;
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MCInstLowering.Lower(MI, TmpInst);
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OutStreamer->emitInstruction(TmpInst, STI);
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}
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void LanaiAsmPrinter::emitInstruction(const MachineInstr *MI) {
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Lanai_MC::verifyInstructionPredicates(MI->getOpcode(),
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getSubtargetInfo().getFeatureBits());
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MachineBasicBlock::const_instr_iterator I = MI->getIterator();
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MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
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do {
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if (I->isCall()) {
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emitCallInstruction(&*I);
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continue;
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}
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customEmitInstruction(&*I);
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} while ((++I != E) && I->isInsideBundle());
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}
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// isBlockOnlyReachableByFallthough - Return true if the basic block has
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// exactly one predecessor and the control transfer mechanism between
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// the predecessor and this block is a fall-through.
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// FIXME: could the overridden cases be handled in analyzeBranch?
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bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
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const MachineBasicBlock *MBB) const {
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// The predecessor has to be immediately before this block.
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const MachineBasicBlock *Pred = *MBB->pred_begin();
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// If the predecessor is a switch statement, assume a jump table
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// implementation, so it is not a fall through.
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if (const BasicBlock *B = Pred->getBasicBlock())
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if (isa<SwitchInst>(B->getTerminator()))
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return false;
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// Check default implementation
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if (!AsmPrinter::isBlockOnlyReachableByFallthrough(MBB))
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return false;
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// Otherwise, check the last instruction.
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// Check if the last terminator is an unconditional branch.
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MachineBasicBlock::const_iterator I = Pred->end();
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while (I != Pred->begin() && !(--I)->isTerminator()) {
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}
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return !I->isBarrier();
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}
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// Force static initialization.
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmPrinter() {
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RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
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}
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