c7a0b2684f
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line. This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned. One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU. I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning. Differential Revision: https://reviews.llvm.org/D85165
80 lines
2.6 KiB
C++
80 lines
2.6 KiB
C++
//===-- MSP430Subtarget.h - Define Subtarget for the MSP430 ----*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the MSP430 specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MSP430_MSP430SUBTARGET_H
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#define LLVM_LIB_TARGET_MSP430_MSP430SUBTARGET_H
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#include "MSP430FrameLowering.h"
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#include "MSP430ISelLowering.h"
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#include "MSP430InstrInfo.h"
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#include "MSP430RegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "MSP430GenSubtargetInfo.inc"
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namespace llvm {
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class StringRef;
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class MSP430Subtarget : public MSP430GenSubtargetInfo {
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public:
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enum HWMultEnum {
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NoHWMult, HWMult16, HWMult32, HWMultF5
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};
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private:
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virtual void anchor();
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bool ExtendedInsts = false;
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HWMultEnum HWMultMode = NoHWMult;
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MSP430FrameLowering FrameLowering;
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MSP430InstrInfo InstrInfo;
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MSP430TargetLowering TLInfo;
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SelectionDAGTargetInfo TSInfo;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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///
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MSP430Subtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM);
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MSP430Subtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
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bool hasHWMult16() const { return HWMultMode == HWMult16; }
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bool hasHWMult32() const { return HWMultMode == HWMult32; }
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bool hasHWMultF5() const { return HWMultMode == HWMultF5; }
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const TargetFrameLowering *getFrameLowering() const override {
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return &FrameLowering;
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}
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const MSP430InstrInfo *getInstrInfo() const override { return &InstrInfo; }
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const TargetRegisterInfo *getRegisterInfo() const override {
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return &InstrInfo.getRegisterInfo();
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}
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const MSP430TargetLowering *getTargetLowering() const override {
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return &TLInfo;
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}
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const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
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return &TSInfo;
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}
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};
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} // End llvm namespace
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#endif // LLVM_TARGET_MSP430_SUBTARGET_H
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