ece4bb5ab8
This information is not preserved in MIR today. So this patch adds information to RISCVMachineFunctionInfo when the vreg is created for the argument. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D134621
46 lines
1.6 KiB
C++
46 lines
1.6 KiB
C++
//=- RISCVMachineFunctionInfo.cpp - RISCV machine function info ---*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares RISCV-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCVMachineFunctionInfo.h"
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using namespace llvm;
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yaml::RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(
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const llvm::RISCVMachineFunctionInfo &MFI)
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: VarArgsFrameIndex(MFI.getVarArgsFrameIndex()),
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VarArgsSaveSize(MFI.getVarArgsSaveSize()) {}
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MachineFunctionInfo *RISCVMachineFunctionInfo::clone(
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BumpPtrAllocator &Allocator, MachineFunction &DestMF,
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const {
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return DestMF.cloneInfo<RISCVMachineFunctionInfo>(*this);
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}
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void yaml::RISCVMachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
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MappingTraits<RISCVMachineFunctionInfo>::mapping(YamlIO, *this);
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}
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void RISCVMachineFunctionInfo::initializeBaseYamlFields(
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const yaml::RISCVMachineFunctionInfo &YamlMFI) {
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VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex;
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VarArgsSaveSize = YamlMFI.VarArgsSaveSize;
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}
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void RISCVMachineFunctionInfo::addSExt32Register(Register Reg) {
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SExt32Registers.push_back(Reg);
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}
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bool RISCVMachineFunctionInfo::isSExt32Register(Register Reg) const {
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return is_contained(SExt32Registers, Reg);
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}
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