2d43955cec
Rename CalleeSavedRegs defs to avoid being overly specific: * CSR_AMDGPU_AGPRs_32_255 => CSR_AMDGPU_AGPRs * CSR_AMDGPU_SGPRs_30_31 + CSR_AMDGPU_SGPRs_32_105 => CSR_AMDGPU_SGPRs * CSR_AMDGPU_SI_Gfx_SGPRs_4_29 + CSR_AMDGPU_SI_Gfx_SGPRs_64_105 => CSR_AMDGPU_SI_Gfx_SGPRs * CSR_AMDGPU_HighRegs => CSR_AMDGPU * CSR_AMDGPU_HighRegs_With_AGPRs => CSR_AMDGPU_GFX90AInsts * CSR_AMDGPU_SI_Gfx_With_AGPRs => CSR_AMDGPU_SI_Gfx_GFX90AInsts Introduce a class RegMask to mark the cases where we use the CalleeSavedRegs class purely as an expedient way to produce a mask. Update the names of these masks to not mention "CSR". Other targets also seem to do this, so a reasonable alternative is to actually update table-gen to include a new class to do this explicitly, but the current approach seems harmless so I opted to just make it more explicit. Reviewed By: arsenm, sebastian-ne Differential Revision: https://reviews.llvm.org/D109008
33 lines
1.1 KiB
YAML
33 lines
1.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx1031 -verify-machineinstrs -run-pass=localizer -o - %s | FileCheck %s
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# Previously this was placing the new G_CONSTANT after the use call
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---
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name: wrong_user_insert_pt
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: wrong_user_insert_pt
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK-NEXT: G_BR %bb.1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; CHECK-NEXT: $sgpr30_sgpr31 = G_SI_CALL [[C1]](p0), 0, csr_amdgpu
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; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc
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; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31
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bb.0:
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%0:_(p0) = G_CONSTANT i64 0
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G_BR %bb.1
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bb.1:
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ADJCALLSTACKUP 0, 0, implicit-def $scc
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$sgpr30_sgpr31 = G_SI_CALL %0, 0, csr_amdgpu
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ADJCALLSTACKDOWN 0, 0, implicit-def $scc
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S_SETPC_B64_return undef $sgpr30_sgpr31
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...
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