262c2c0fd2
vectorize-buffer-fat-pointer.ll required a manual check line fix. vector-alloca-addrspacecast.ll required a manual fixup of a check line. partial-regcopy-and-spill-missed-at-regalloc.ll required re-running update_mir_test_checks. The HSA metadata tests required avoiding the script touching the type name in the metadata. annotate-noclobber.ll ran into one update script bug. It deleted a check line with a 0 offset GEP, moving the following -NEXT check logically up one line.
79 lines
3.4 KiB
LLVM
79 lines
3.4 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 --amdhsa-code-object-version=5 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefix=CHECK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=5 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefix=CHECK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=5 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX9 %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 --amdhsa-code-object-version=5 < %s | FileCheck --check-prefix=CHECK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=5 < %s | FileCheck --check-prefix=CHECK %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=5 < %s | FileCheck --check-prefixes=CHECK,GFX9 %s
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; On gfx8, the queue ptr is required for this addrspacecast.
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; CHECK: - .args:
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; PRE-GFX9: hidden_queue_ptr
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; GFX9-NOT: hidden_queue_ptr
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; CHECK-LABEL: .name: addrspacecast_requires_queue_ptr
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define amdgpu_kernel void @addrspacecast_requires_queue_ptr(ptr addrspace(5) %ptr.private, ptr addrspace(3) %ptr.local) {
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%flat.private = addrspacecast ptr addrspace(5) %ptr.private to ptr
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%flat.local = addrspacecast ptr addrspace(3) %ptr.local to ptr
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store volatile i32 1, ptr %flat.private
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store volatile i32 2, ptr %flat.local
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ret void
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}
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; CHECK: - .args:
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; PRE-GFX9: hidden_shared_base
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; GFX9-NOT: hidden_shared_base
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; CHECK-LABEL: .name: is_shared_requires_queue_ptr
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define amdgpu_kernel void @is_shared_requires_queue_ptr(ptr %ptr) {
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%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %ptr)
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%zext = zext i1 %is.shared to i32
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store volatile i32 %zext, ptr addrspace(1) undef
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ret void
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}
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; CHECK: - .args:
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; PRE-GFX9: hidden_private_base
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; GFX9-NOT: hidden_private_base
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; CHECK-LABEL: .name: is_private_requires_queue_ptr
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define amdgpu_kernel void @is_private_requires_queue_ptr(ptr %ptr) {
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%is.private = call i1 @llvm.amdgcn.is.private(ptr %ptr)
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%zext = zext i1 %is.private to i32
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store volatile i32 %zext, ptr addrspace(1) undef
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ret void
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}
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; CHECK: - .args:
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; PRE-GFX9: hidden_queue_ptr
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; GFX9-NOT: hidden_queue_ptr
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; CHECK-LABEL: .name: trap_requires_queue_ptr
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define amdgpu_kernel void @trap_requires_queue_ptr() {
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call void @llvm.trap()
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unreachable
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}
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; CHECK: - .args:
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; CHECK: hidden_queue_ptr
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; CHECK-LABEL: .name: amdgcn_queue_ptr_requires_queue_ptr
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define amdgpu_kernel void @amdgcn_queue_ptr_requires_queue_ptr(ptr addrspace(1) %ptr) {
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%queue.ptr = call ptr addrspace(4) @llvm.amdgcn.queue.ptr()
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%implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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%dispatch.ptr = call ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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%dispatch.id = call i64 @llvm.amdgcn.dispatch.id()
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%queue.load = load volatile i8, ptr addrspace(4) %queue.ptr
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%implicitarg.load = load volatile i8, ptr addrspace(4) %implicitarg.ptr
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%dispatch.load = load volatile i8, ptr addrspace(4) %dispatch.ptr
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store volatile i64 %dispatch.id, ptr addrspace(1) %ptr
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ret void
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}
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declare noalias ptr addrspace(4) @llvm.amdgcn.queue.ptr()
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declare noalias ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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declare i64 @llvm.amdgcn.dispatch.id()
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declare noalias ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
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declare i1 @llvm.amdgcn.is.shared(ptr)
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declare i1 @llvm.amdgcn.is.private(ptr)
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declare void @llvm.trap()
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declare void @llvm.debugtrap()
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