29247824f5
Unlike the callee-saved VGPR spill instructions emitted by `PEI::spillCalleeSavedRegs`, the CS VGPR spills inserted during emitPrologue/emitEpilogue require the exec bits flipping to avoid clobbering the inactive lanes of VGPRs used for SGPR spilling. Currently, these spill instructions are referenced from the SP at function entry and when the callee performs a stack realignment, they ended up getting incorrect stack offsets. Even if we try to adjust the offsets, the FP-SP becomes a runtime entity with dynamic stack realignment and the offsets would still be inaccurate. To fix it, use FP as the frame base in the spill instructions whenever the function has FP. The offsets obtained for the CS objects would always be the right values from FP. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D134949
63 lines
2.6 KiB
LLVM
63 lines
2.6 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=hawaii -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; Test calls when called by other callable functions rather than
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; kernels.
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declare void @external_void_func_i32(i32) #0
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm:
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; GCN: s_waitcnt
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; Spill CSR VGPR used for SGPR spilling
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; GCN: s_mov_b32 [[FP_SCRATCH_COPY:s[0-9]+]], s33
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; GCN-NEXT: s_mov_b32 s33, s32
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; GCN-NEXT: s_or_saveexec_b64 [[COPY_EXEC0:s\[[0-9]+:[0-9]+\]]], -1{{$}}
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; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
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; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
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; GCN-NEXT: s_mov_b64 exec, [[COPY_EXEC0]]
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; GCN-DAG: v_writelane_b32 v41, [[FP_SCRATCH_COPY]], 0
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; GCN-DAG: v_writelane_b32 v40, s30, 0
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; GCN-DAG: v_writelane_b32 v40, s31, 1
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; GCN: s_swappc_b64
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; GCN: v_readlane_b32 s31, v40, 1
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; GCN: v_readlane_b32 s30, v40, 0
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; GCN-NEXT: v_readlane_b32 [[FP_SCRATCH_COPY:s[0-9]+]], v41, 0
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; GCN: s_or_saveexec_b64 [[COPY_EXEC1:s\[[0-9]+:[0-9]+\]]], -1{{$}}
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; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
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; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload
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; GCN-NEXT: s_mov_b64 exec, [[COPY_EXEC1]]
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; GCN-NEXT: s_addk_i32 s32, 0xfc00
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; GCN-NEXT: s_mov_b32 s33, [[FP_SCRATCH_COPY]]
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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define void @test_func_call_external_void_func_i32_imm() #0 {
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call void @external_void_func_i32(i32 42)
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ret void
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}
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; GCN-LABEL: {{^}}test_func_call_external_void_func_i32_imm_stack_use:
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; GCN: s_waitcnt
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; GCN: s_mov_b32 s33, s32
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; GCN-DAG: s_addk_i32 s32, 0x1400{{$}}
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; GCN-DAG: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s33 offset:
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; GCN: s_swappc_b64
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; GCN: s_addk_i32 s32, 0xec00{{$}}
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; GCN: s_setpc_b64
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define void @test_func_call_external_void_func_i32_imm_stack_use() #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%gep15 = getelementptr inbounds [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 16
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store volatile i32 0, ptr addrspace(5) %alloca
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store volatile i32 0, ptr addrspace(5) %gep15
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call void @external_void_func_i32(i32 42)
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind noinline }
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