96d3c82645
While the PPC litte-endian miscompile did get addressed by https://reviews.llvm.org/D140046 the PPV big-endian bots are still unhappy. https://lab.llvm.org/buildbot/#/builders/93/builds/12560 This reverts commit 7bd358bcb4e358b4351c69e02ef76939e08acdc7.
31 lines
1.3 KiB
LLVM
31 lines
1.3 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; Check that we do not use AGPRs for v32i32 type
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; GCN-LABEL: {{^}}test_v1024:
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; GCN-NOT: v_accvgpr
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; GCN-COUNT-32: v_mov_b32_e32
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; GCN-NOT: v_accvgpr
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define amdgpu_kernel void @test_v1024() {
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entry:
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%alloca = alloca <32 x i32>, align 16, addrspace(5)
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call void @llvm.memset.p5.i32(ptr addrspace(5) %alloca, i8 0, i32 128, i1 false)
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br i1 undef, label %if.then.i.i, label %if.else.i
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if.then.i.i: ; preds = %entry
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call void @llvm.memcpy.p5.p5.i64(ptr addrspace(5) align 16 %alloca, ptr addrspace(5) align 4 undef, i64 128, i1 false)
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br label %if.then.i62.i
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if.else.i: ; preds = %entry
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br label %if.then.i62.i
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if.then.i62.i: ; preds = %if.else.i, %if.then.i.i
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call void @llvm.memcpy.p1.p5.i64(ptr addrspace(1) align 4 undef, ptr addrspace(5) align 16 %alloca, i64 128, i1 false)
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ret void
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}
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declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture readonly, i8, i32, i1 immarg)
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declare void @llvm.memcpy.p5.p5.i64(ptr addrspace(5) nocapture writeonly, ptr addrspace(5) nocapture readonly, i64, i1 immarg)
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declare void @llvm.memcpy.p1.p5.i64(ptr addrspace(1) nocapture writeonly, ptr addrspace(5) nocapture readonly, i64, i1 immarg)
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