de48717fcf
This patch really just extends D39946 towards stores as well as loads. While the patch is in SelectionDAGBuilder, it only applies to AVR (the only target that supports unaligned atomic operations). Differential Revision: https://reviews.llvm.org/D128483
21 lines
604 B
LLVM
21 lines
604 B
LLVM
; RUN: llc -mattr=addsubiw < %s -march=avr | FileCheck %s
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; This verifies that the backend can handle an unaligned atomic load and store.
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;
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; In the past, an assertion inside the SelectionDAGBuilder would always
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; hit an assertion for unaligned loads and stores.
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%AtomicI16 = type { %CellI16, [0 x i8] }
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%CellI16 = type { i16, [0 x i8] }
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; CHECK-LABEL: foo
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; CHECK: ret
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define void @foo(%AtomicI16* %self) {
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start:
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%a = getelementptr inbounds %AtomicI16, %AtomicI16* %self, i16 0, i32 0, i32 0
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load atomic i16, i16* %a seq_cst, align 1
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store atomic i16 5, i16* %a seq_cst, align 1
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ret void
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}
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