Files
clang-p2996/llvm/test/CodeGen/CSKY/cmp-i.ll
Zi Xuan Wu (Zeson) 70b8b738c5 [CSKY] Fix the btsti16 instruction missing in generic processor
Normally, generic processor does not have any SubtargetFeature. And it
can just generate most basic instructions which have no Predicates to
guard.

But it needs to enbale predicate for the btsti16 instruction as one of the most basic instructions.
Or the generic processor can't finish codegen process. So Add FeatureBTST16 SubtargetFeature to generic ProcessorModel.
2022-07-27 17:39:15 +08:00

3220 lines
89 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
;eq
define i1 @icmpRR_eq(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmpne16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_eq(i32 %x) {
; CHECK-LABEL: icmpRI_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpnei16 a0, 10
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmpnei16 a0, 10
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_eq(i32 %x) {
; CHECK-LABEL: icmpRI_X_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmpne16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmpne16 a0, a2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_eq(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a1, a3
; CHECK-NEXT: xor16 a0, a2
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: xor16 a1, a3
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_eq(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a2, a0
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmpnei16 a2, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_eq(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a0, l0
; GENERIC-NEXT: and16 l0, a1
; GENERIC-NEXT: cmpne16 l0, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_eq(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: cmpnei16 a3, 1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_eq(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: cmpne16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_eq(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: cmpnei16 a1, 1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_eq(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: movi16 a1, 1
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_eq(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_eq:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_eq:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp eq i1 %x, 1
ret i1 %icmp
}
;ne
define i1 @icmpRR_ne(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmpne16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_ne(i32 %x) {
; CHECK-LABEL: icmpRI_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmpnei16 a0, 10
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmpnei16 a0, 10
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_ne(i32 %x) {
; CHECK-LABEL: icmpRI_X_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmpne16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmpne16 a0, a2
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_ne(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a1, a3
; CHECK-NEXT: xor16 a0, a2
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: xor16 a1, a3
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_ne(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: subu16 a2, a0
; GENERIC-NEXT: mov16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_ne(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a0, l0
; GENERIC-NEXT: and16 l0, a1
; GENERIC-NEXT: cmpne16 l0, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_ne(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: cmpnei16 a3, 1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_ne(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: cmpne16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: cmpne16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_ne(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: cmpnei16 a1, 1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_ne(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xor16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_ne(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_ne:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_ne:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 1
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ne i1 %x, 1
ret i1 %icmp
}
;ugt
define i1 @icmpRR_ugt(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_ugt(i32 %x) {
; CHECK-LABEL: icmpRI_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 10
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 10
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_ugt(i32 %x) {
; CHECK-LABEL: icmpRI_X_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_ugt(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 8
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 4)
; CHECK-NEXT: cmphs16 a1, a3
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: cmphs16 a0, a2
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: ld16.w a2, (sp, 4)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: cmphs16 a1, a3
; GENERIC-NEXT: mvcv16 l0
; GENERIC-NEXT: cmphs16 a0, a2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB25_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: mov16 a0, l0
; GENERIC-NEXT: .LBB25_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_ugt(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a2, 1
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvcv16 a2
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: movf32 a0, a2
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB26_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: subu16 a2, a1
; GENERIC-NEXT: mov16 a0, a2
; GENERIC-NEXT: .LBB26_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_ugt(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a1, l0
; GENERIC-NEXT: and16 l0, a0
; GENERIC-NEXT: cmphs16 l0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_ugt(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: movi16 a1, 1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmphs16 a0, a3
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_ugt(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: cmphs16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_ugt(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: movi16 a1, 1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmphs16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_ugt(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: and16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_ugt(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_ugt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_ugt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a0, 0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ugt i1 %x, 1
ret i1 %icmp
}
;uge
define i1 @icmpRR_uge(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_uge(i32 %x) {
; CHECK-LABEL: icmpRI_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 9
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 9
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_uge(i32 %x) {
; CHECK-LABEL: icmpRI_X_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33767
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 231
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_uge(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: cmphs16 a3, a1
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 12)
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 8)
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: ld16.w a0, (sp, 12)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 8
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l1, -4
; GENERIC-NEXT: .cfi_offset l0, -8
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 12
; GENERIC-NEXT: mov16 l0, a0
; GENERIC-NEXT: cmphs16 a3, a1
; GENERIC-NEXT: mvcv16 l1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmphs16 a2, l0
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB36_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: subu16 a0, l1
; GENERIC-NEXT: br32 .LBB36_3
; GENERIC-NEXT: .LBB36_2:
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB36_3: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 8
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_uge(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_uge(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a0, l0
; GENERIC-NEXT: and16 l0, a1
; GENERIC-NEXT: cmphs16 l0, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_uge(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: cmpnei16 a3, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_uge(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_uge(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_uge(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_uge(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_uge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_uge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp uge i1 %x, 1
ret i1 %icmp
}
;ult
define i1 @icmpRR_ult(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_ult(i32 %x) {
; CHECK-LABEL: icmpRI_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphsi16 a0, 10
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphsi16 a0, 10
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_ult(i32 %x) {
; CHECK-LABEL: icmpRI_X_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmphs16 a0, a2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_ult(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 8
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 4)
; CHECK-NEXT: cmphs16 a3, a1
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: ld16.w a2, (sp, 4)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a1, a0
; CHECK-NEXT: mov16 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: cmphs16 a3, a1
; GENERIC-NEXT: mvcv16 l0
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB47_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: mov16 a0, l0
; GENERIC-NEXT: .LBB47_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_ult(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_ult(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a0, l0
; GENERIC-NEXT: and16 l0, a1
; GENERIC-NEXT: cmphs16 l0, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_ult(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: cmpnei16 a3, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_ult(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: cmphs16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: cmphs16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_ult(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_ult(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a2, a1
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_ult(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_ult:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_ult:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 1
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ult i1 %x, 1
ret i1 %icmp
}
;ule
define i1 @icmpRR_ule(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_ule(i32 %x) {
; CHECK-LABEL: icmpRI_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmphsi16 a0, 11
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphsi16 a0, 11
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_ule(i32 %x) {
; CHECK-LABEL: icmpRI_X_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33769
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 233
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmphs16 a0, a2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_ule(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: cmphs16 a1, a3
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 12)
; CHECK-NEXT: cmphs16 a0, a2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 8)
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: ld16.w a0, (sp, 12)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 8
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l1, -4
; GENERIC-NEXT: .cfi_offset l0, -8
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 12
; GENERIC-NEXT: mov16 l0, a0
; GENERIC-NEXT: cmphs16 a1, a3
; GENERIC-NEXT: mvcv16 l1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmphs16 l0, a2
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB58_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: subu16 a0, l1
; GENERIC-NEXT: br32 .LBB58_3
; GENERIC-NEXT: .LBB58_2:
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB58_3: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 8
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_ule(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 8
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: st16.w a1, (sp, 4)
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: ld16.w a2, (sp, 4)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 8
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphsi16 a0, 2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB59_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: movi16 a0, 0
; GENERIC-NEXT: .LBB59_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_ule(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a1, a1
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: lsli16 a3, a2, 24
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a3
; GENERIC-NEXT: movi16 a3, 255
; GENERIC-NEXT: lsli16 l0, a3, 8
; GENERIC-NEXT: or16 l0, a2
; GENERIC-NEXT: or16 l0, a3
; GENERIC-NEXT: and16 a1, l0
; GENERIC-NEXT: and16 l0, a0
; GENERIC-NEXT: cmphs16 l0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_ule(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zexth16 a0, a0
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a2, a1, 24
; GENERIC-NEXT: lsli16 a1, a1, 16
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: lsli16 a3, a2, 8
; GENERIC-NEXT: or16 a3, a1
; GENERIC-NEXT: or16 a3, a2
; GENERIC-NEXT: and16 a3, a0
; GENERIC-NEXT: cmphsi16 a3, 2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_ule(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a1, a1
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmphs16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 255
; GENERIC-NEXT: and16 a1, a2
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: cmphs16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_ule(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: zextb16 a0, a0
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 255
; GENERIC-NEXT: and16 a1, a0
; GENERIC-NEXT: cmphsi16 a1, 2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_ule(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a2, a1
; GENERIC-NEXT: or16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_ule(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_ule:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_ule:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp ule i1 %x, 1
ret i1 %icmp
}
;sgt
define i1 @icmpRR_sgt(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_sgt(i32 %x) {
; CHECK-LABEL: icmpRI_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 10
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 10
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_sgt(i32 %x) {
; CHECK-LABEL: icmpRI_X_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmplt16 a2, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_sgt(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: cmplt16 a1, a3
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: st16.w a1, (sp, 8)
; CHECK-NEXT: cmphs16 a0, a2
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: cmplt16 a1, a3
; GENERIC-NEXT: mvcv16 l0
; GENERIC-NEXT: cmphs16 a0, a2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB69_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, l0
; GENERIC-NEXT: .LBB69_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_sgt(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: movi16 a2, 0
; CHECK-NEXT: cmplt16 a2, a1
; CHECK-NEXT: mvc32 a2
; CHECK-NEXT: st16.w a2, (sp, 8)
; CHECK-NEXT: movi16 a2, 1
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvcv16 a2
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: ld16.w a0, (sp, 8)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a1, (sp, 4)
; CHECK-NEXT: btsti16 a1, 0
; CHECK-NEXT: movf32 a0, a2
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: cmplt16 a2, a1
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: movi16 a3, 1
; GENERIC-NEXT: cmphs16 a3, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB70_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: subu16 a3, a2
; GENERIC-NEXT: mov16 a0, a3
; GENERIC-NEXT: .LBB70_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_sgt(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a1, a1
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a1, a1
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_sgt(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: movi16 a1, 1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a1, a0
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_sgt(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a1, a1
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a1, a1
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_sgt(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: movi16 a1, 1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a1, a0
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_sgt(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a2, a1
; GENERIC-NEXT: and16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_sgt(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_sgt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_sgt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 1
; GENERIC-NEXT: xor16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sgt i1 %x, 1
ret i1 %icmp
}
;sge
define i1 @icmpRR_sge(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_sge(i32 %x) {
; CHECK-LABEL: icmpRI_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a1, 9
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 9
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_sge(i32 %x) {
; CHECK-LABEL: icmpRI_X_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33767
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 231
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmplt16 a2, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_sge(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 8)
; CHECK-NEXT: cmplt16 a3, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: ld16.w a1, (sp, 4)
; CHECK-NEXT: btsti16 a1, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmplt16 a3, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bf16 .LBB80_2
; GENERIC-NEXT: # %bb.1:
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB80_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_sge(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movi16 a2, 0
; CHECK-NEXT: cmplt16 a2, a1
; CHECK-NEXT: mvc32 a2
; CHECK-NEXT: st16.w a2, (sp, 12)
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 8)
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: ld16.w a0, (sp, 12)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 16
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: mov16 a2, a0
; GENERIC-NEXT: movi16 a0, 0
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a3
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: cmpnei16 a2, 0
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB81_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: subu16 a0, a3
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
; GENERIC-NEXT: .LBB81_2:
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_sge(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: sexth16 a1, a1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: sexth16 a1, a1
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_sge(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_sge(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: sextb16 a1, a1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: sextb16 a1, a1
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_sge(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: movi16 a1, 0
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_sge(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a1, a1, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a2, a1
; GENERIC-NEXT: or16 a0, a2
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_sge(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_sge:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_sge:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sge i1 %x, 1
ret i1 %icmp
}
;slt
define i1 @icmpRR_slt(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_slt(i32 %x) {
; CHECK-LABEL: icmpRI_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplti16 a0, 10
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplti16 a0, 10
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_slt(i32 %x) {
; CHECK-LABEL: icmpRI_X_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33768
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 232
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmplt16 a0, a2
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_slt(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: cmplt16 a3, a1
; CHECK-NEXT: mvc32 t0
; CHECK-NEXT: st32.w t0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: st16.w a1, (sp, 8)
; CHECK-NEXT: cmphs16 a2, a0
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
; GENERIC-NEXT: .cfi_offset l0, -4
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 8
; GENERIC-NEXT: cmplt16 a3, a1
; GENERIC-NEXT: mvcv16 l0
; GENERIC-NEXT: cmphs16 a2, a0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB91_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, l0
; GENERIC-NEXT: .LBB91_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_slt(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: movi16 a2, 0
; CHECK-NEXT: cmplt16 a1, a2
; CHECK-NEXT: mvc32 a2
; CHECK-NEXT: st16.w a2, (sp, 4)
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: st16.w a1, (sp, 8)
; CHECK-NEXT: cmpnei16 a0, 0
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: cmplt16 a1, a2
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmpnei16 a0, 0
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB92_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB92_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_slt(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: sexth16 a1, a1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: sexth16 a1, a1
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_slt(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: cmplti16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: cmplti16 a0, 1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_slt(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: sextb16 a1, a1
; CHECK-NEXT: cmplt16 a1, a0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: sextb16 a1, a1
; GENERIC-NEXT: cmplt16 a1, a0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_slt(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: cmplti16 a0, 1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: cmplti16 a0, 1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_slt(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: and16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: and16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_slt(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_slt:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movi16 a0, 0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_slt:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a0, 0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp slt i1 %x, 1
ret i1 %icmp
}
;sle
define i1 @icmpRR_sle(i32 %x, i32 %y) {
; CHECK-LABEL: icmpRR_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRR_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %y, %x
ret i1 %icmp
}
define i1 @icmpRI_sle(i32 %x) {
; CHECK-LABEL: icmpRI_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cmplti16 a0, 11
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmplti16 a0, 11
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 10
ret i1 %icmp
}
define i1 @icmpRI_X_sle(i32 %x) {
; CHECK-LABEL: icmpRI_X_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movih32 a1, 62
; CHECK-NEXT: ori32 a1, a1, 33769
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: icmpRI_X_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a1, 0
; GENERIC-NEXT: lsli16 a1, a1, 24
; GENERIC-NEXT: movi16 a2, 62
; GENERIC-NEXT: lsli16 a2, a2, 16
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: movi16 a1, 131
; GENERIC-NEXT: lsli16 a1, a1, 8
; GENERIC-NEXT: or16 a1, a2
; GENERIC-NEXT: movi16 a2, 233
; GENERIC-NEXT: or16 a2, a1
; GENERIC-NEXT: cmplt16 a0, a2
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i32 %x, 4097000
ret i1 %icmp
}
define i1 @ICMP_LONG_sle(i64 %x, i64 %y) {
; CHECK-LABEL: ICMP_LONG_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: cmphs16 a0, a2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 4)
; CHECK-NEXT: cmpne16 a3, a1
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: st16.w a0, (sp, 8)
; CHECK-NEXT: cmplt16 a1, a3
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: ld16.w a1, (sp, 4)
; CHECK-NEXT: btsti16 a1, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: cmphs16 a0, a2
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmplt16 a1, a3
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpne16 a3, a1
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bf16 .LBB102_2
; GENERIC-NEXT: # %bb.1:
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB102_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i64 %y, %x
ret i1 %icmp
}
define i1 @ICMP_LONG_I_sle(i64 %x) {
; CHECK-LABEL: ICMP_LONG_I_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .cfi_def_cfa_offset 0
; CHECK-NEXT: subi16 sp, sp, 12
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: movi16 a2, 0
; CHECK-NEXT: cmplt16 a1, a2
; CHECK-NEXT: mvc32 a2
; CHECK-NEXT: st16.w a2, (sp, 4)
; CHECK-NEXT: cmpnei16 a1, 0
; CHECK-NEXT: mvc32 a1
; CHECK-NEXT: st16.w a1, (sp, 8)
; CHECK-NEXT: cmphsi16 a0, 2
; CHECK-NEXT: mvcv16 a1
; CHECK-NEXT: ld16.w a0, (sp, 4)
; CHECK-NEXT: btsti16 a0, 0
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: ld16.w a2, (sp, 8)
; CHECK-NEXT: btsti16 a2, 0
; CHECK-NEXT: movf32 a0, a1
; CHECK-NEXT: addi16 sp, sp, 12
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_LONG_I_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 0
; GENERIC-NEXT: cmplt16 a1, a2
; GENERIC-NEXT: mvcv16 a2
; GENERIC-NEXT: cmphsi16 a0, 2
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: cmpnei16 a1, 0
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: btsti16 a1, 0
; GENERIC-NEXT: bt16 .LBB103_2
; GENERIC-NEXT: # %bb.1: # %entry
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a2
; GENERIC-NEXT: .LBB103_2: # %entry
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i64 %x, 1
ret i1 %icmp
}
define i1 @ICMP_SHORT_sle(i16 %x, i16 %y) {
; CHECK-LABEL: ICMP_SHORT_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a1, a1
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a1, a1
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %y, %x
ret i1 %icmp
}
define i1 @ICMP_SHORT_I_sle(i16 %x) {
; CHECK-LABEL: ICMP_SHORT_I_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sexth16 a0, a0
; CHECK-NEXT: cmplti16 a0, 2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_SHORT_I_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sexth16 a0, a0
; GENERIC-NEXT: cmplti16 a0, 2
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i16 %x, 1
ret i1 %icmp
}
define i1 @ICMP_CHAR_sle(i8 %x, i8 %y) {
; CHECK-LABEL: ICMP_CHAR_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a1, a1
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: cmplt16 a0, a1
; CHECK-NEXT: mvcv16 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a1, a1
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: cmplt16 a0, a1
; GENERIC-NEXT: mvcv16 a0
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %y, %x
ret i1 %icmp
}
define i1 @ICMP_CHAR_I_sle(i8 %x) {
; CHECK-LABEL: ICMP_CHAR_I_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sextb16 a0, a0
; CHECK-NEXT: cmplti16 a0, 2
; CHECK-NEXT: mvc32 a0
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_CHAR_I_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: sextb16 a0, a0
; GENERIC-NEXT: cmplti16 a0, 2
; GENERIC-NEXT: mvcv16 a1
; GENERIC-NEXT: movi16 a0, 1
; GENERIC-NEXT: subu16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i8 %x, 1
ret i1 %icmp
}
define i1 @ICMP_BIT_sle(i1 %x, i1 %y) {
; CHECK-LABEL: ICMP_BIT_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori32 a0, a0, 1
; CHECK-NEXT: or16 a0, a1
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: movi16 a2, 1
; GENERIC-NEXT: xor16 a0, a2
; GENERIC-NEXT: or16 a0, a1
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %y, %x
ret i1 %icmp
}
define i1 @ICMP_BIT_I_sle(i1 %x) {
; CHECK-LABEL: ICMP_BIT_I_sle:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rts16
;
; GENERIC-LABEL: ICMP_BIT_I_sle:
; GENERIC: # %bb.0: # %entry
; GENERIC-NEXT: .cfi_def_cfa_offset 0
; GENERIC-NEXT: subi16 sp, sp, 4
; GENERIC-NEXT: .cfi_def_cfa_offset 4
; GENERIC-NEXT: addi16 sp, sp, 4
; GENERIC-NEXT: rts16
entry:
%icmp = icmp sle i1 %x, 1
ret i1 %icmp
}