4ad517e6b0
CSKY arch has multiple FPU instruction versions such as FPU, FPUv2 and FPUv3 to implement floating operations. For now, we just only support FPUv2 and FPUv3. It includes the encoding, asm parsing of instructions and codegen of DAG nodes.
107 lines
3.4 KiB
LLVM
107 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv2_sf -mattr=+fpuv2_df | FileCheck %s --check-prefix=CHECK-DF
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; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -float-abi=hard -mattr=+hard-float -mattr=+2e3 -mattr=+fpuv3_sf -mattr=+fpuv3_df | FileCheck %s --check-prefix=CHECK-DF2
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define double @load_I_d(double* nocapture readonly %a) local_unnamed_addr #0 {
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;
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;
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; CHECK-DF-LABEL: load_I_d:
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; CHECK-DF: # %bb.0: # %entry
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; CHECK-DF-NEXT: fldd vr0, (a0, 24)
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; CHECK-DF-NEXT: rts16
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;
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; CHECK-DF2-LABEL: load_I_d:
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; CHECK-DF2: # %bb.0: # %entry
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; CHECK-DF2-NEXT: fld.64 vr0, (a0, 24)
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; CHECK-DF2-NEXT: rts16
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entry:
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%arrayidx = getelementptr inbounds double, double* %a, i64 3
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%0 = load double, double* %arrayidx, align 4
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ret double %0
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}
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define double @load_R_d(double* nocapture readonly %a, i32 %b) local_unnamed_addr #0 {
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;
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;
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; CHECK-DF-LABEL: load_R_d:
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; CHECK-DF: # %bb.0: # %entry
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; CHECK-DF-NEXT: fldrd vr0, (a0, a1 << 3)
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; CHECK-DF-NEXT: rts16
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;
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; CHECK-DF2-LABEL: load_R_d:
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; CHECK-DF2: # %bb.0: # %entry
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; CHECK-DF2-NEXT: fldr.64 vr0, (a0, a1 << 3)
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; CHECK-DF2-NEXT: rts16
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entry:
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%idxprom = sext i32 %b to i64
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%arrayidx = getelementptr inbounds double, double* %a, i64 %idxprom
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%0 = load double, double* %arrayidx, align 4
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ret double %0
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}
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define double @store_I_d(double* %a, double %b) local_unnamed_addr #0 {
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;
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;
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; CHECK-DF-LABEL: store_I_d:
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; CHECK-DF: # %bb.0: # %entry
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; CHECK-DF-NEXT: fstd vr0, (a0, 24)
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; CHECK-DF-NEXT: grs32 a0, .LCPI2_0
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; CHECK-DF-NEXT: fldd vr0, (a0, 0)
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; CHECK-DF-NEXT: rts16
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; CHECK-DF-NEXT: .p2align 1
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; CHECK-DF-NEXT: # %bb.1:
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; CHECK-DF-NEXT: .p2align 2
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; CHECK-DF-NEXT: .LCPI2_0:
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; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
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;
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; CHECK-DF2-LABEL: store_I_d:
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; CHECK-DF2: # %bb.0: # %entry
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; CHECK-DF2-NEXT: fst.64 vr0, (a0, 24)
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; CHECK-DF2-NEXT: flrw.64 vr0, [.LCPI2_0]
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; CHECK-DF2-NEXT: rts16
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; CHECK-DF2-NEXT: .p2align 1
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; CHECK-DF2-NEXT: # %bb.1:
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; CHECK-DF2-NEXT: .p2align 2
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; CHECK-DF2-NEXT: .LCPI2_0:
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; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0
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entry:
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%arrayidx = getelementptr inbounds double, double* %a, i64 3
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store double %b, double* %arrayidx, align 4
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ret double 0.0
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}
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define double @store_R_d(double* %a, i32 %b, double %c) local_unnamed_addr #0 {
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;
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;
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; CHECK-DF-LABEL: store_R_d:
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; CHECK-DF: # %bb.0: # %entry
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; CHECK-DF-NEXT: fstrd vr0, (a0, a1 << 3)
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; CHECK-DF-NEXT: grs32 a0, .LCPI3_0
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; CHECK-DF-NEXT: fldd vr0, (a0, 0)
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; CHECK-DF-NEXT: rts16
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; CHECK-DF-NEXT: .p2align 1
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; CHECK-DF-NEXT: # %bb.1:
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; CHECK-DF-NEXT: .p2align 2
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; CHECK-DF-NEXT: .LCPI3_0:
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; CHECK-DF-NEXT: .quad 0x0000000000000000 # double 0
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;
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; CHECK-DF2-LABEL: store_R_d:
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; CHECK-DF2: # %bb.0: # %entry
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; CHECK-DF2-NEXT: fstr.64 vr0, (a0, a1 << 3)
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; CHECK-DF2-NEXT: flrw.64 vr0, [.LCPI3_0]
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; CHECK-DF2-NEXT: rts16
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; CHECK-DF2-NEXT: .p2align 1
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; CHECK-DF2-NEXT: # %bb.1:
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; CHECK-DF2-NEXT: .p2align 2
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; CHECK-DF2-NEXT: .LCPI3_0:
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; CHECK-DF2-NEXT: .quad 0x0000000000000000 # double 0
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entry:
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%idxprom = sext i32 %b to i64
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%arrayidx = getelementptr inbounds double, double* %a, i64 %idxprom
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store double %c, double* %arrayidx, align 4
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ret double 0.0
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}
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