d391e4fe84
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth. Helps prevent future scheduler model mismatches like those that were only addressed in D44687. Differential Revision: https://reviews.llvm.org/D113302
35 lines
799 B
YAML
35 lines
799 B
YAML
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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define i32 @test(i32 %a) {
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entry:
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%b = alloca i32
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%x = alloca i64
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%y = alloca i32, i32 %a
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store i32 %a, i32* %b
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store i64 2, i64* %x
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%c = load i32, i32* %b
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ret i32 %c
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}
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...
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---
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name: test
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frameInfo:
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stackSize: 24
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offsetAdjustment: -16
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maxAlignment: 8
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adjustsStack: true
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stack:
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- { id: 0, offset: -20, size: 4, alignment: 4 }
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- { id: 1, offset: -32, size: 8, alignment: 8 }
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# CHECK: [[@LINE+1]]:49: unknown key 'size'
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- { id: 2, type: variable-sized, offset: -32, size: 42, alignment: 1 }
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body: |
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bb.0.entry:
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MOV32mr %rsp, 1, _, -4, _, %edi
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MOV64mi32 %rsp, 1, _, -16, _, 2
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%eax = MOV32rm %rsp, 1, _, -4, _
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RET64 %eax
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...
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