46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -march=nvptx -mcpu=sm_20 | %ptxas-verify %}
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;;; Need 4-byte alignment on ptr passed byval
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define ptx_device void @t1(ptr byval(float) %x) {
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; CHECK: .func t1
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; CHECK: .param .align 4 .b8 t1_param_0[4]
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ret void
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}
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;;; Need 8-byte alignment on ptr passed byval
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define ptx_device void @t2(ptr byval(double) %x) {
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; CHECK: .func t2
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; CHECK: .param .align 8 .b8 t2_param_0[8]
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ret void
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}
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;;; Need 4-byte alignment on float2* passed byval
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%struct.float2 = type { float, float }
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define ptx_device void @t3(ptr byval(%struct.float2) %x) {
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; CHECK: .func t3
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; CHECK: .param .align 4 .b8 t3_param_0[8]
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ret void
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}
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;;; Need at least 4-byte alignment in order to avoid miscompilation by
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;;; ptxas for sm_50+
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define ptx_device void @t4(ptr byval(i8) %x) {
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; CHECK: .func t4
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; CHECK: .param .align 4 .b8 t4_param_0[1]
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ret void
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}
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;;; Make sure we adjust alignment at the call site as well.
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define ptx_device void @t5(ptr align 2 byval(i8) %x) {
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; CHECK: .func t5
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; CHECK: .param .align 4 .b8 t5_param_0[1]
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; CHECK: {
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; CHECK: .param .align 4 .b8 param0[1];
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; CHECK: call.uni
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call void @t4(ptr byval(i8) %x)
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ret void
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}
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