b5e1fc19da
We added a new post-isel CTRLoop pass in D122125. That pass will expand the hardware loop related intrinsic to CTR loop or normal loop based on the loop context. So we don't need to conservatively check the CTR clobber now on the IR level. Reviewed By: lkail Differential Revision: https://reviews.llvm.org/D135847
60 lines
1.8 KiB
LLVM
60 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
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; RUN: FileCheck %s --implicit-check-not=mtctr --implicit-check-not=bdnz
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$test = comdat any
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; No CTR loop due to frem (since it is always a call).
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define void @test() nounwind comdat {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
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; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
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; CHECK-NEXT: stdu 1, -64(1)
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; CHECK-NEXT: std 0, 80(1)
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: ld 30, 32(1)
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; CHECK-NEXT: sub 4, 3, 30
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; CHECK-NEXT: cmpld 4, 3
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; CHECK-NEXT: iselgt 3, 0, 4
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; CHECK-NEXT: addi 29, 3, 1
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %forcond
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; CHECK-NEXT: #
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; CHECK-NEXT: addi 29, 29, -1
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; CHECK-NEXT: cmpldi 29, 0
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; CHECK-NEXT: bc 4, 1, .LBB0_3
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; CHECK-NEXT: # %bb.2: # %bounds.ok
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; CHECK-NEXT: #
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; CHECK-NEXT: lfs 2, 0(3)
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; CHECK-NEXT: xxlxor 1, 1, 1
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 30, 30, 1
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; CHECK-NEXT: stfs 1, 0(3)
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; CHECK-NEXT: b .LBB0_1
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; CHECK-NEXT: .LBB0_3: # %bounds.fail
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; CHECK-NEXT: std 30, 32(1)
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%pos = alloca i64, align 8
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br label %forcond
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forcond: ; preds = %bounds.ok, %0
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%1 = load i64, ptr %pos
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%.len1 = load i64, ptr undef
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%bounds.cmp = icmp ult i64 %1, %.len1
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br i1 %bounds.cmp, label %bounds.ok, label %bounds.fail
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bounds.ok: ; preds = %forcond
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%2 = load float, ptr undef
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%3 = frem float 0.000000e+00, %2
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store float %3, ptr undef
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%4 = load i64, ptr %pos
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%5 = add i64 %4, 1
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store i64 %5, ptr %pos
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br label %forcond
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bounds.fail: ; preds = %forcond
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unreachable
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}
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