eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
60 lines
1.9 KiB
LLVM
60 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64-unknown-unknown -verify-machineinstrs \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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@a = dso_local local_unnamed_addr global double 0.000000e+00, align 8
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define dso_local signext i32 @b() local_unnamed_addr #0 {
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; CHECK-LABEL: b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: stdu r1, -144(r1)
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; CHECK-NEXT: std r0, 160(r1)
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; CHECK-NEXT: addis r3, r2, a@toc@ha
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; CHECK-NEXT: li r4, 1
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; CHECK-NEXT: lfd f0, a@toc@l(r3)
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; CHECK-NEXT: addis r3, r2, .LCPI0_0@toc@ha
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; CHECK-NEXT: rldic r4, r4, 63, 0
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; CHECK-NEXT: lfs f1, .LCPI0_0@toc@l(r3)
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; CHECK-NEXT: fsub f2, f0, f1
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; CHECK-NEXT: fctidz f2, f2
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; CHECK-NEXT: stfd f2, 128(r1)
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; CHECK-NEXT: fctidz f2, f0
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; CHECK-NEXT: stfd f2, 120(r1)
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; CHECK-NEXT: ld r3, 128(r1)
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; CHECK-NEXT: ld r5, 120(r1)
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; CHECK-NEXT: fcmpu cr0, f0, f1
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; CHECK-NEXT: xor r3, r3, r4
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; CHECK-NEXT: bc 12, lt, .LBB0_1
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; CHECK-NEXT: b .LBB0_2
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; CHECK-NEXT: .LBB0_1: # %entry
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; CHECK-NEXT: addi r3, r5, 0
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; CHECK-NEXT: .LBB0_2: # %entry
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; CHECK-NEXT: std r3, 112(r1)
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; CHECK-NEXT: addis r3, r2, .LCPI0_1@toc@ha
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; CHECK-NEXT: lfd f0, 112(r1)
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; CHECK-NEXT: lfs f1, .LCPI0_1@toc@l(r3)
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; CHECK-NEXT: fcfid f0, f0
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; CHECK-NEXT: fmul f0, f0, f1
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; CHECK-NEXT: fctiwz f0, f0
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; CHECK-NEXT: stfd f0, 136(r1)
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; CHECK-NEXT: lwa r3, 140(r1)
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; CHECK-NEXT: bl g
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi r1, r1, 144
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%0 = load double, ptr @a, align 8
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%conv = fptoui double %0 to i64
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%conv1 = sitofp i64 %conv to double
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%mul = fmul double %conv1, 1.000000e+06
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%conv2 = fptosi double %mul to i32
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%call = tail call signext i32 @g(i32 signext %conv2) #0
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ret i32 %call
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}
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declare signext i32 @g(i32 signext) local_unnamed_addr
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attributes #0 = { nounwind }
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