Files
clang-p2996/llvm/test/CodeGen/PowerPC/pr46759.ll
Kai Nacke 5403c59c60 [PPC] Opaque pointer migration, part 2.
The LIT test cases were migrated with the script provided by
Nikita Popov. Due to the size of the change it is split into
several parts.

Reviewed By: nemanja, nikic

Differential Revision: https://reviews.llvm.org/D135474
2022-10-11 17:24:06 +00:00

70 lines
2.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
; RUN: -check-prefix=CHECK-LE %s
define void @foo(i32 %vla_size) #0 {
; CHECK-LE-LABEL: foo:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: clrldi r12, r1, 53
; CHECK-LE-NEXT: std r31, -8(r1)
; CHECK-LE-NEXT: std r30, -16(r1)
; CHECK-LE-NEXT: mr r30, r1
; CHECK-LE-NEXT: sub r0, r1, r12
; CHECK-LE-NEXT: li r12, -6144
; CHECK-LE-NEXT: add r0, r12, r0
; CHECK-LE-NEXT: sub r12, r0, r1
; CHECK-LE-NEXT: cmpdi r12, -4096
; CHECK-LE-NEXT: bge cr0, .LBB0_2
; CHECK-LE-NEXT: .LBB0_1: # %entry
; CHECK-LE-NEXT: #
; CHECK-LE-NEXT: stdu r30, -4096(r1)
; CHECK-LE-NEXT: addi r12, r12, 4096
; CHECK-LE-NEXT: cmpdi r12, -4096
; CHECK-LE-NEXT: blt cr0, .LBB0_1
; CHECK-LE-NEXT: .LBB0_2: # %entry
; CHECK-LE-NEXT: stdux r30, r1, r12
; CHECK-LE-NEXT: mr r0, r30
; CHECK-LE-NEXT: .cfi_def_cfa_register r0
; CHECK-LE-NEXT: .cfi_def_cfa_register r30
; CHECK-LE-NEXT: .cfi_offset r31, -8
; CHECK-LE-NEXT: .cfi_offset r30, -16
; CHECK-LE-NEXT: clrldi r3, r3, 32
; CHECK-LE-NEXT: li r5, -2048
; CHECK-LE-NEXT: mr r31, r1
; CHECK-LE-NEXT: addi r3, r3, 15
; CHECK-LE-NEXT: rldicl r3, r3, 60, 4
; CHECK-LE-NEXT: rldicl r3, r3, 4, 31
; CHECK-LE-NEXT: neg r4, r3
; CHECK-LE-NEXT: ld r3, 0(r1)
; CHECK-LE-NEXT: and r5, r4, r5
; CHECK-LE-NEXT: mr r4, r5
; CHECK-LE-NEXT: li r5, -4096
; CHECK-LE-NEXT: divd r6, r4, r5
; CHECK-LE-NEXT: mulld r5, r6, r5
; CHECK-LE-NEXT: sub r5, r4, r5
; CHECK-LE-NEXT: add r4, r1, r4
; CHECK-LE-NEXT: stdux r3, r1, r5
; CHECK-LE-NEXT: cmpd r1, r4
; CHECK-LE-NEXT: beq cr0, .LBB0_4
; CHECK-LE-NEXT: .LBB0_3: # %entry
; CHECK-LE-NEXT: #
; CHECK-LE-NEXT: stdu r3, -4096(r1)
; CHECK-LE-NEXT: cmpd r1, r4
; CHECK-LE-NEXT: bne cr0, .LBB0_3
; CHECK-LE-NEXT: .LBB0_4: # %entry
; CHECK-LE-NEXT: addi r3, r1, 2048
; CHECK-LE-NEXT: lbz r3, 0(r3)
; CHECK-LE-NEXT: mr r1, r30
; CHECK-LE-NEXT: ld r31, -8(r1)
; CHECK-LE-NEXT: ld r30, -16(r1)
; CHECK-LE-NEXT: blr
entry:
%0 = zext i32 %vla_size to i64
%vla = alloca i8, i64 %0, align 2048
%1 = load volatile i8, ptr %vla, align 2048
ret void
}
attributes #0 = { "probe-stack"="inline-asm" }