eb7d16ea25
mflr is kind of expensive on Power version smaller than 10, so we should schedule the store for the mflr's def away from mflr. In epilogue, the expensive mtlr has no user for its def, so it doesn't matter that the load and the mtlr are back-to-back. Reviewed By: RolandF Differential Revision: https://reviews.llvm.org/D137423
181 lines
6.9 KiB
LLVM
181 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64-unknown-freebsd13.0 -verify-machineinstrs \
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; RUN: -mcpu=ppc64 -ppc-asm-full-reg-names < %s | FileCheck %s
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@a = local_unnamed_addr global float* null, align 8
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; Function Attrs: nounwind
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define void @d() local_unnamed_addr #0 {
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; CHECK-LABEL: d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: stdu r1, -208(r1)
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; CHECK-NEXT: addis r3, r2, .LC0@toc@ha
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; CHECK-NEXT: std r0, 224(r1)
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; CHECK-NEXT: ld r3, .LC0@toc@l(r3)
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; CHECK-NEXT: std r29, 184(r1) # 8-byte Folded Spill
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; CHECK-NEXT: std r30, 192(r1) # 8-byte Folded Spill
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; CHECK-NEXT: ld r29, 0(r3)
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; CHECK-NEXT: bl c
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; CHECK-NEXT: nop
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: bl b
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; CHECK-NEXT: nop
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; CHECK-NEXT: cmpwi r30, 0
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; CHECK-NEXT: ble cr0, .LBB0_9
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; CHECK-NEXT: # %bb.1: # %for.body.preheader
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; CHECK-NEXT: cmplwi r30, 4
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; CHECK-NEXT: clrldi r4, r30, 32
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; CHECK-NEXT: li r5, 0
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; CHECK-NEXT: blt cr0, .LBB0_7
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; CHECK-NEXT: # %bb.2: # %vector.memcheck
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; CHECK-NEXT: rldic r6, r30, 2, 30
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; CHECK-NEXT: add r7, r3, r6
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; CHECK-NEXT: cmpld r29, r7
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; CHECK-NEXT: add r6, r29, r6
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; CHECK-NEXT: bc 4, lt, .LBB0_4
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; CHECK-NEXT: # %bb.3: # %vector.memcheck
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; CHECK-NEXT: cmpld r3, r6
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; CHECK-NEXT: bc 12, lt, .LBB0_7
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; CHECK-NEXT: .LBB0_4: # %vector.ph
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; CHECK-NEXT: rlwinm r5, r4, 0, 0, 29
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; CHECK-NEXT: li r7, 15
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; CHECK-NEXT: addi r6, r5, -4
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; CHECK-NEXT: addi r8, r1, 144
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; CHECK-NEXT: rldicl r6, r6, 62, 2
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; CHECK-NEXT: addi r9, r1, 128
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; CHECK-NEXT: addi r6, r6, 1
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; CHECK-NEXT: addi r10, r1, 160
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; CHECK-NEXT: mtctr r6
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; CHECK-NEXT: li r6, 0
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; CHECK-NEXT: addi r11, r1, 112
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; CHECK-NEXT: .LBB0_5: # %vector.body
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; CHECK-NEXT: #
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; CHECK-NEXT: add r12, r3, r6
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; CHECK-NEXT: lvx v3, r3, r6
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; CHECK-NEXT: lvx v5, r12, r7
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; CHECK-NEXT: add r12, r29, r6
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; CHECK-NEXT: lvsl v2, r3, r6
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; CHECK-NEXT: vperm v2, v3, v5, v2
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; CHECK-NEXT: lvx v3, r29, r6
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; CHECK-NEXT: lvx v5, r12, r7
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; CHECK-NEXT: lvsl v4, r29, r6
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; CHECK-NEXT: stvx v2, 0, r8
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; CHECK-NEXT: vperm v2, v3, v5, v4
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; CHECK-NEXT: stvx v2, 0, r9
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; CHECK-NEXT: lfs f0, 156(r1)
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; CHECK-NEXT: lfs f1, 140(r1)
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; CHECK-NEXT: fdivs f0, f1, f0
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; CHECK-NEXT: lfs f1, 136(r1)
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; CHECK-NEXT: stfs f0, 172(r1)
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; CHECK-NEXT: lfs f0, 152(r1)
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; CHECK-NEXT: fdivs f0, f1, f0
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; CHECK-NEXT: lfs f1, 132(r1)
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; CHECK-NEXT: stfs f0, 168(r1)
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; CHECK-NEXT: lfs f0, 148(r1)
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; CHECK-NEXT: fdivs f0, f1, f0
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; CHECK-NEXT: lfs f1, 128(r1)
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; CHECK-NEXT: stfs f0, 164(r1)
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; CHECK-NEXT: lfs f0, 144(r1)
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; CHECK-NEXT: fdivs f0, f1, f0
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; CHECK-NEXT: stfs f0, 160(r1)
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; CHECK-NEXT: lvx v2, 0, r10
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; CHECK-NEXT: stvx v2, 0, r11
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; CHECK-NEXT: ld r0, 112(r1)
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; CHECK-NEXT: stdx r0, r29, r6
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; CHECK-NEXT: addi r6, r6, 16
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; CHECK-NEXT: ld r0, 120(r1)
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; CHECK-NEXT: std r0, 8(r12)
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; CHECK-NEXT: bdnz .LBB0_5
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; CHECK-NEXT: # %bb.6: # %middle.block
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; CHECK-NEXT: cmpld r5, r4
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; CHECK-NEXT: beq cr0, .LBB0_9
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; CHECK-NEXT: .LBB0_7: # %for.body.preheader18
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; CHECK-NEXT: sldi r6, r5, 2
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; CHECK-NEXT: sub r5, r4, r5
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; CHECK-NEXT: addi r6, r6, -4
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; CHECK-NEXT: add r3, r3, r6
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; CHECK-NEXT: add r4, r29, r6
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; CHECK-NEXT: mtctr r5
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; CHECK-NEXT: .LBB0_8: # %for.body
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; CHECK-NEXT: #
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; CHECK-NEXT: lfsu f0, 4(r4)
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; CHECK-NEXT: lfsu f1, 4(r3)
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; CHECK-NEXT: fdivs f0, f0, f1
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; CHECK-NEXT: stfs f0, 0(r4)
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; CHECK-NEXT: bdnz .LBB0_8
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; CHECK-NEXT: .LBB0_9: # %for.end
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; CHECK-NEXT: ld r30, 192(r1) # 8-byte Folded Reload
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; CHECK-NEXT: ld r29, 184(r1) # 8-byte Folded Reload
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; CHECK-NEXT: addi r1, r1, 208
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: blr
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entry:
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%0 = load float*, float** @a, align 8
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%call = call signext i32 bitcast (i32 (...)* @c to i32 ()*)() #2
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%call1 = call float* bitcast (float* (...)* @b to float* ()*)() #2
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%cmp11 = icmp sgt i32 %call, 0
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br i1 %cmp11, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %call to i64
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%min.iters.check = icmp ult i32 %call, 4
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br i1 %min.iters.check, label %for.body.preheader18, label %vector.memcheck
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vector.memcheck: ; preds = %for.body.preheader
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%scevgep = getelementptr float, float* %0, i64 %wide.trip.count
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%scevgep15 = getelementptr float, float* %call1, i64 %wide.trip.count
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%bound0 = icmp ult float* %0, %scevgep15
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%bound1 = icmp ult float* %call1, %scevgep
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%found.conflict = and i1 %bound0, %bound1
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br i1 %found.conflict, label %for.body.preheader18, label %vector.ph
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vector.ph: ; preds = %vector.memcheck
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%n.vec = and i64 %wide.trip.count, 4294967292
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%1 = getelementptr inbounds float, float* %call1, i64 %index
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%2 = bitcast float* %1 to <4 x float>*
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%wide.load = load <4 x float>, <4 x float>* %2, align 4
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%3 = getelementptr inbounds float, float* %0, i64 %index
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%4 = bitcast float* %3 to <4 x float>*
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%wide.load17 = load <4 x float>, <4 x float>* %4, align 4
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%5 = fdiv reassoc nsz arcp afn <4 x float> %wide.load17, %wide.load
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%6 = bitcast float* %3 to <4 x float>*
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store <4 x float> %5, <4 x float>* %6, align 4
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%index.next = add i64 %index, 4
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%7 = icmp eq i64 %index.next, %n.vec
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br i1 %7, label %middle.block, label %vector.body
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middle.block: ; preds = %vector.body
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%cmp.n = icmp eq i64 %n.vec, %wide.trip.count
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br i1 %cmp.n, label %for.end, label %for.body.preheader18
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for.body.preheader18: ; preds = %middle.block, %vector.memcheck, %for.body.preheader
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%indvars.iv.ph = phi i64 [ 0, %vector.memcheck ], [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]
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br label %for.body
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for.body: ; preds = %for.body.preheader18, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ %indvars.iv.ph, %for.body.preheader18 ]
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%arrayidx = getelementptr inbounds float, float* %call1, i64 %indvars.iv
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%8 = load float, float* %arrayidx, align 4
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%arrayidx3 = getelementptr inbounds float, float* %0, i64 %indvars.iv
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%9 = load float, float* %arrayidx3, align 4
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%div = fdiv reassoc nsz arcp afn float %9, %8
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store float %div, float* %arrayidx3, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond.not, label %for.end, label %for.body
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for.end: ; preds = %for.body, %middle.block, %entry
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ret void
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}
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declare signext i32 @c(...) local_unnamed_addr #1
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declare float* @b(...) local_unnamed_addr #1
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attributes #0 = { nounwind }
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