Files
clang-p2996/llvm/test/CodeGen/PowerPC/shrink-wrap.ll
esmeyi 6e0e926c2f [PowerPC] Converts to comparison against zero even when the optimization
doesn't happened in peephole optimizer.

Summary: Converting a comparison against 1 or -1 into a comparison
against 0 can exploit record-form instructions for comparison optimization.
The conversion will happen only when a record-form instruction can be used
to replace the comparison during the peephole optimizer (see function optimizeCompareInstr).

In post-RA, we also want to optimize the comparison by using the record
form (see D131873) and it requires additional dataflow analysis to reliably
find uses of the CR register set.

It's reasonable to common the conversion for both peephole optimizer and
post-RA optimizer.

Converting to comparison against zero even when the optimization doesn't
happened in peephole optimizer may create additional opportunities for the
post-RA optimization.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D131374
2022-09-15 06:06:25 -04:00

55 lines
2.1 KiB
LLVM

; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 | FileCheck %s --check-prefixes=CHECK,CHECK64
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECK,CHECK32
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 -mattr=-altivec | FileCheck %s --check-prefixes=CHECKAIX,CHECK64
define signext i32 @shrinkwrapme(i32 signext %a, i32 signext %lim) {
entry:
%cmp5 = icmp sgt i32 %lim, 0
br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
for.body.preheader: ; preds = %entry
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
br label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
%Ret.0.lcssa = phi i32 [ 0, %entry ], [ %0, %for.cond.cleanup.loopexit ]
ret i32 %Ret.0.lcssa
for.body: ; preds = %for.body.preheader, %for.body
%i.07 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
%Ret.06 = phi i32 [ %0, %for.body ], [ 0, %for.body.preheader ]
%0 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"(i32 %a, i32 %Ret.06)
%inc = add nuw nsw i32 %i.07, 1
%exitcond = icmp eq i32 %inc, %lim
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
; CHECK-LABEL: {{[\.]?}}shrinkwrapme:
; CHECK: # %bb.0:
; CHECK-NEXT: cmpwi
; Prolog code
; CHECK64-COUNT-18: std
; CHECK32-COUNT-18: stw
; CHECK: ble 0, {{.*}}BB0_3
; CHECKAIX: blt 0, {{.*}}BB0_3
; CHECK: # %bb.1:
; CHECK: li
; CHECK: {{.*}}BB0_2:
; CHECK: add
; CHECK: bdnz {{.*}}BB0_2
; CHECK-NEXT: b {{.*}}BB0_4
; CHECK: {{.*}}BB0_3:
; CHECK-NEXT: li
; CHECK: {{.*}}BB0_4:
; Epilog code
; CHECK64-COUNT-18: ld
;
; CHECK32-COUNT-18: lwz
; CHECK: blr
}