a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
250 lines
7.2 KiB
LLVM
250 lines
7.2 KiB
LLVM
; Test passing variable argument lists in 64-bit calls on z/OS.
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; RUN: llc < %s -mtriple=s390x-ibm-zos -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-ibm-zos -mcpu=z14 | FileCheck %s -check-prefix=ARCH12
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; CHECK-LABEL: call_vararg_double0
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; CHECK: llihf 3, 1074118262
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; CHECK-NEXT: oilf 3, 3367254360
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; CHECK: lghi 1, 1
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; CHECK: lghi 2, 2
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define i64 @call_vararg_double0() {
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entry:
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%retval = call i64 (i64, i64, ...) @pass_vararg0(i64 1, i64 2, double 2.718000e+00)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_double1
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; CHECK: llihf 0, 1074118262
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; CHECK-NEXT: oilf 0, 3367254360
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; CHECK: llihf 3, 1074340036
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; CHECK-NEXT: oilf 3, 2611340116
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; CHECK: lghi 1, 1
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; CHECK: lghi 2, 2
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; CHECK: stg 0, 2200(4)
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define i64 @call_vararg_double1() {
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entry:
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%retval = call i64 (i64, i64, ...) @pass_vararg0(i64 1, i64 2, double 3.141000e+00, double 2.718000e+00)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_double2
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; CHECK-NOT: llihf 0
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; CHECK-NOT: oilf 0
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; CHECK: llihf 2, 1074118262
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; CHECK-NEXT: oilf 2, 3367254360
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; CHECK: lghi 1, 8200
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define i64 @call_vararg_double2() {
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entry:
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%retval = call i64 (i64, ...) @pass_vararg2(i64 8200, double 2.718000e+00)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_double3
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; CHECK: llihf 0, 1072703839
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; CHECK-NEXT: oilf 0, 2861204133
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; CHECK: llihf 1, 1074118262
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; CHECK-NEXT: oilf 1, 3367254360
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; CHECK: llihf 2, 1074340036
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; CHECK-NEXT: oilf 2, 2611340116
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; CHECK: llihf 3, 1073127358
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; CHECK-NEXT: oilf 3, 1992864825
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; CHECK: stg 0, 2200(4)
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define i64 @call_vararg_double3() {
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entry:
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%retval = call i64 (...) @pass_vararg3(double 2.718000e+00, double 3.141000e+00, double 1.414000e+00, double 1.010101e+00)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_both0
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; CHECK: lgr 2, 1
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; CHECK: lgdr 1, 0
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define i64 @call_vararg_both0(i64 %arg0, double %arg1) {
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%retval = call i64(...) @pass_vararg3(double %arg1, i64 %arg0)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_long_double0
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; CHECK: larl 1, @CPI5_0
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; CHECK-NEXT: ld 0, 0(1)
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; CHECK-NEXT: ld 2, 8(1)
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; CHECK-NEXT: lgdr 3, 0
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; CHECK: lghi 1, 1
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; CHECK: lghi 2, 2
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; CHECK: std 0, 2192(4)
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; CHECK-NEXT: std 2, 2200(4)
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define i64 @call_vararg_long_double0() {
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entry:
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%retval = call i64 (i64, i64, ...) @pass_vararg0(i64 1, i64 2, fp128 0xLE0FC1518450562CD4000921FB5444261)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_long_double1
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; CHECK: lgdr 3, 0
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; CHECK: lghi 1, 1
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; CHECK: lghi 2, 2
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; CHECK: std 0, 2192(4)
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; CHECK-NEXT: std 2, 2200(4)
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define i64 @call_vararg_long_double1(fp128 %arg0) {
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entry:
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%retval = call i64 (i64, i64, ...) @pass_vararg0(i64 1, i64 2, fp128 %arg0)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_long_double2
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; CHECK: std 4, 2208(4)
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; CHECK-NEXT: std 6, 2216(4)
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; CHECK: lgdr 3, 0
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; CHECK: lghi 1, 1
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; CHECK: lghi 2, 2
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; CHECK: std 0, 2192(4)
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; CHECK-NEXT: std 2, 2200(4)
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define i64 @call_vararg_long_double2(fp128 %arg0, fp128 %arg1) {
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entry:
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%retval = call i64 (i64, i64, ...) @pass_vararg0(i64 1, i64 2, fp128 %arg0, fp128 %arg1)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_long_double3
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; CHECK: lgdr 3, 2
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; CHECK-NEXT: lgdr 2, 0
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define i64 @call_vararg_long_double3(fp128 %arg0) {
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entry:
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%retval = call i64 (...) @pass_vararg3(fp128 %arg0)
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ret i64 %retval
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}
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; ARCH12-LABEL: call_vec_vararg_test0
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; ARCH12: vlgvg 3, 24, 1
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; ARCH12: vlgvg 2, 24, 0
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; ARCH12: lghi 1, 1
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define void @call_vec_vararg_test0(<2 x double> %v) {
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%retval = call i64(i64, ...) @pass_vararg2(i64 1, <2 x double> %v)
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ret void
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}
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; ARCH12-LABEL: call_vec_vararg_test1
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; ARCH12: larl 1, @CPI10_0
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; ARCH12: vl 0, 0(1), 3
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; ARCH12: vlgvg 3, 24, 0
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; ARCH12: vrepg 2, 0, 1
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; ARCH12: vst 25, 2208(4), 3
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; ARCH12: vst 24, 2192(4), 3
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define void @call_vec_vararg_test1(<4 x i32> %v, <2 x i64> %w) {
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%retval = call i64(fp128, ...) @pass_vararg1(fp128 0xLE0FC1518450562CD4000921FB5444261, <4 x i32> %v, <2 x i64> %w)
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ret void
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}
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; ARCH12-LABEL: call_vec_char_vararg_straddle
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; ARCH12: vlgvg 3, 24, 0
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; ARCH12: lghi 1, 1
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; ARCH12: lghi 2, 2
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; ARCH12: vst 24, 2192(4), 3
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define void @call_vec_char_vararg_straddle(<16 x i8> %v) {
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%retval = call i64(i64, i64, ...) @pass_vararg0(i64 1, i64 2, <16 x i8> %v)
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ret void
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}
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; ARCH12-LABEL: call_vec_short_vararg_straddle
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; ARCH12: vlgvg 3, 24, 0
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; ARCH12: lghi 1, 1
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; ARCH12: lghi 2, 2
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; ARCH12: vst 24, 2192(4), 3
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define void @call_vec_short_vararg_straddle(<8 x i16> %v) {
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%retval = call i64(i64, i64, ...) @pass_vararg0(i64 1, i64 2, <8 x i16> %v)
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ret void
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}
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; ARCH12-LABEL: call_vec_int_vararg_straddle
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; ARCH12: vlgvg 3, 24, 0
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; ARCH12: lghi 1, 1
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; ARCH12: lghi 2, 2
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; ARCH12: vst 24, 2192(4), 3
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define void @call_vec_int_vararg_straddle(<4 x i32> %v) {
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%retval = call i64(i64, i64, ...) @pass_vararg0(i64 1, i64 2, <4 x i32> %v)
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ret void
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}
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; ARCH12-LABEL: call_vec_double_vararg_straddle
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; ARCH12: vlgvg 3, 24, 0
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; ARCH12: lghi 1, 1
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; ARCH12: lghi 2, 2
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; ARCH12: vst 24, 2192(4), 3
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define void @call_vec_double_vararg_straddle(<2 x double> %v) {
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%retval = call i64(i64, i64, ...) @pass_vararg0(i64 1, i64 2, <2 x double> %v)
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ret void
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}
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; CHECK-LABEL: call_vararg_integral0
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; Since arguments 0, 1, and 2 are already in the correct
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; registers, we should have no loads of any sort into
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; GPRs 1, 2, and 3.
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; CHECK-NOT: lg 1
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; CHECK-NOT: lgr 1
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; CHECK-NOT: lg 2
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; CHECK-NOT: lgr 2
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; CHECK-NOT: lg 3
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; CHECK-NOT: lgr 3
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define i64 @call_vararg_integral0(i32 signext %arg0, i16 signext %arg1, i64 signext %arg2, i8 signext %arg3) {
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entry:
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%retval = call i64(...) @pass_vararg3(i32 signext %arg0, i16 signext %arg1, i64 signext %arg2, i8 signext %arg3)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_float0
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; CHECK: lghi 1, 1
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; CHECK: llihf 2, 1073692672
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define i64 @call_vararg_float0() {
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entry:
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%retval = call i64 (i64, ...) @pass_vararg2(i64 1, float 1.953125)
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ret i64 %retval
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}
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; CHECK-LABEL: call_vararg_float1
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; CHECK: larl 1, @CPI17_0
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; CHECK: le 0, 0(1)
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; CHECK: llihf 0, 1073692672
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; CHECK: llihh 2, 16384
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; CHECK: llihh 3, 16392
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; CHECK: stg 0, 2200(4)
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define i64 @call_vararg_float1() {
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entry:
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%retval = call i64 (float, ...) @pass_vararg4(float 1.0, float 2.0, float 3.0, float 1.953125)
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ret i64 %retval
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}
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; Derived from C source:
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; #define _VARARG_EXT_
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; #include <stdarg.h>
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;
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; long pass(long x, ...) {
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; va_list va;
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; va_start(va, x);
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; long ret = va_arg(va, long);
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; va_end(va);
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; return ret;
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; }
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;
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; CHECK-LABEL: pass_vararg:
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; CHECK: aghi 4, -160
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; CHECK: la 0, 2208(4)
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; CHECK: stg 0, 2200(4)
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define hidden i64 @pass_vararg(i64 %x, ...) {
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entry:
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%va = alloca ptr, align 8
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call void @llvm.va_start(ptr %va)
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%argp.cur = load ptr, ptr %va, align 8
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%argp.next = getelementptr inbounds i8, ptr %argp.cur, i64 8
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store ptr %argp.next, ptr %va, align 8
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%ret = load i64, ptr %argp.cur, align 8
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call void @llvm.va_end(ptr %va)
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ret i64 %ret
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}
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declare void @llvm.va_start(ptr)
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declare void @llvm.va_end(ptr)
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declare i64 @pass_vararg0(i64 %arg0, i64 %arg1, ...)
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declare i64 @pass_vararg1(fp128 %arg0, ...)
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declare i64 @pass_vararg2(i64 %arg0, ...)
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declare i64 @pass_vararg3(...)
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declare i64 @pass_vararg4(float, ...)
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