5ecd363295
This reverts commit 122efef8ee.
- Patch fixed to not reuse definitions from predecessors in EH landing pads.
- Late review suggestions (by MaskRay) have been addressed.
- M68k/pipeline.ll test updated.
- Init captures added in processBlock() to avoid capturing structured bindings.
- RISCV has this disabled for now.
Original commit message:
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instructions
whenever found by scanning the MF once while keeping track of register
definitions in a map. These instructions are typically immediate loads
resulting from rematerialization, and address loads emitted by target in
eliminateFrameInde().
This is enabled by default, but a target could easily disable it by means of
'disablePass(&MachineLateInstrsCleanupID);'.
This late cleanup is naturally not "optimal" in removing instructions as it
is done by looking at phys-regs, but still quite effective. It would be
desirable to improve other parts of CodeGen and avoid these redundant
instructions in the first place, but there are no ideas for this yet.
Differential Revision: https://reviews.llvm.org/D123394
Reviewed By: RKSimon, foad, craig.topper, arsenm, asb
328 lines
8.1 KiB
YAML
328 lines
8.1 KiB
YAML
# RUN: llc -mtriple=s390x-linux-gnu -start-before=prologepilog %s -o - -mcpu=z14 \
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# RUN: -verify-machineinstrs 2>&1 | FileCheck %s
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# REQUIRES: asserts
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#
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# Test that redundant frame addressing anchor points are removed by
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# MachineLateInstrsCleanup.
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--- |
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define void @fun1() { ret void }
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define void @fun2() { ret void }
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define void @fun3() { ret void }
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define void @fun4() { ret void }
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define void @fun5() { ret void }
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define void @fun6() { ret void }
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define void @fun7() { ret void }
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define void @fun8() { ret void }
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declare i32 @foo()
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@ptr = external dso_local local_unnamed_addr global ptr
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---
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# Test elimination of redundant LAYs in successor blocks.
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# CHECK-LABEL: fun1:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK: # %bb.1:
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# CHECK-NOT: lay
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# CHECK: .LBB0_2:
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# CHECK-NOT: lay
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---
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name: fun1
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 5000 }
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- { id: 1, size: 2500 }
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- { id: 2, size: 2500 }
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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liveins: $f16d
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successors: %bb.2(0x00000001), %bb.1(0x7fffffff)
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.1, 0, $noreg
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CHIMux undef $r0l, 3, implicit-def $cc
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BRC 14, 8, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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liveins: $f16d
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VST64 renamable $f16d, %stack.2, 0, $noreg
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J %bb.2
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bb.2:
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liveins: $f16d
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VST64 renamable $f16d, %stack.1, 0, $noreg
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Return
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...
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# In this function the LAY in bb.1 will have a different offset, so the first
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# LAY in bb.2 must remain.
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# CHECK-LABEL: fun2:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK: # %bb.1:
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# CHECK: lay %r1, 8192(%r15)
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# CHECK: .LBB1_2:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK-NOT: lay
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---
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name: fun2
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 5000 }
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- { id: 1, size: 5000 }
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- { id: 2, size: 2500 }
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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liveins: $f16d
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successors: %bb.2(0x00000001), %bb.1(0x7fffffff)
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.1, 0, $noreg
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CHIMux undef $r0l, 3, implicit-def $cc
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BRC 14, 8, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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liveins: $f16d
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VST64 renamable $f16d, %stack.2, 0, $noreg
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J %bb.2
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bb.2:
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liveins: $f16d
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VST64 renamable $f16d, %stack.1, 0, $noreg
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VST64 renamable $f16d, %stack.1, 0, $noreg
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Return
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...
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# Test case with a loop (with room for improvement: since %r1 is not clobbered
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# inside the loop only the first LAY is needed).
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# CHECK-LABEL: fun3:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK: .LBB2_1:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK: .LBB2_2:
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# CHECK-NOT: lay %r1, 4096(%r15)
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---
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name: fun3
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 5000 }
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- { id: 1, size: 2500 }
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- { id: 2, size: 2500 }
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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liveins: $f16d
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successors: %bb.2(0x00000001), %bb.1(0x7fffffff)
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.1, 0, $noreg
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CHIMux undef $r0l, 3, implicit-def $cc
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BRC 14, 8, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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liveins: $f16d
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successors: %bb.2(0x00000001), %bb.1(0x7fffffff)
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VST64 renamable $f16d, %stack.2, 0, $noreg
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CHIMux undef $r0l, 3, implicit-def $cc
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BRC 14, 8, %bb.1, implicit killed $cc
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J %bb.2
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bb.2:
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liveins: $f16d
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VST64 renamable $f16d, %stack.1, 0, $noreg
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Return
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...
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# Test case with a call which clobbers r1: the second LAY after the call is needed.
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# CHECK-LABEL: fun4:
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# CHECK: lay %r1, 4096(%r15)
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# CHECK: brasl
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# CHECK: lay %r1, 4096(%r15)
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---
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name: fun4
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 5000 }
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- { id: 1, size: 2500 }
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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liveins: $f16d
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.1, 0, $noreg
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ADJCALLSTACKDOWN 0, 0
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CallBRASL @foo, csr_systemz_elf, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc, implicit-def $r2l
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ADJCALLSTACKUP 0, 0
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$f17d = IMPLICIT_DEF
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VST64 renamable $f17d, %stack.1, 0, $noreg
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Return
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...
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# Test case where index reg is loaded instead of using an LAY. Only one LGHI is needed.
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# CHECK-LABEL: fun5:
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# CHECK: lghi %r1, 4096
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# CHECK-NOT: lghi
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---
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name: fun5
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 5000 }
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- { id: 1, size: 2500 }
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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liveins: $f16d
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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VST64 renamable $f16d, %stack.0, 0, $noreg
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$f0q = nofpexcept LXEB %stack.1, 0, $noreg, implicit $fpc
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$f1q = nofpexcept LXEB %stack.1, 0, $noreg, implicit $fpc
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Return
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...
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# Test where the constant is a Global. Only one LARL is needed.
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# CHECK-LABEL: fun6:
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# CHECK: larl %r1, ptr
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# CHECK-NOT: larl
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---
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name: fun6
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alignment: 16
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tracksRegLiveness: true
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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fixedStack:
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- { id: 0, offset: -160, size: 8, alignment: 8 }
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.2(0x30000000), %bb.1(0x50000000)
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renamable $r1d = LARL @ptr
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CGHSI killed renamable $r1d, 0, 0, implicit-def $cc :: (volatile dereferenceable load (s64) from @ptr)
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BRC 14, 8, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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renamable $r1d = LARL @ptr
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MVGHI killed renamable $r1d, 0, 0
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bb.2:
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Return
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...
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# Load of an invariant location (GOT). Only one LGRL is needed.
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# CHECK-LABEL: fun7:
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# CHECK: lgrl %r1, ptr
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# CHECK-NOT: lgrl
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---
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name: fun7
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alignment: 16
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tracksRegLiveness: true
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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fixedStack:
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- { id: 0, offset: -160, size: 8, alignment: 8 }
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machineFunctionInfo: {}
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body: |
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bb.0:
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successors: %bb.2(0x30000000), %bb.1(0x50000000)
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renamable $r1d = LGRL @ptr :: (load (s64) from got)
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CGHSI killed renamable $r1d, 0, 0, implicit-def $cc :: (volatile dereferenceable load (s64) from @ptr)
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BRC 14, 8, %bb.2, implicit killed $cc
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J %bb.1
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bb.1:
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renamable $r1d = LGRL @ptr :: (load (s64) from got)
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MVGHI killed renamable $r1d, 0, 0
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bb.2:
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Return
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...
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# Load from constant pool. Only one LARL is needed.
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# CHECK-LABEL: fun8:
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# CHECK: larl %r1, .LCPI7_0
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# CHECK-NOT: larl
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---
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name: fun8
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alignment: 16
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tracksRegLiveness: true
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tracksDebugUserValues: true
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liveins:
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- { reg: '$f0s' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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fixedStack:
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- { id: 0, offset: -160, size: 8, alignment: 8 }
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constants:
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- id: 0
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value: float 0x43E0000000000000
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alignment: 4
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machineFunctionInfo: {}
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body: |
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bb.0 (%ir-block.0):
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successors: %bb.1, %bb.2
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liveins: $f0s
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renamable $r1d = LARL %const.0
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renamable $f1s = LE killed renamable $r1d, 0, $noreg :: (load (s32) from constant-pool)
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nofpexcept CEBR renamable $f0s, renamable $f1s, implicit-def $cc, implicit $fpc
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BRC 15, 11, %bb.2, implicit killed $cc
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bb.1:
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liveins: $f0s
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J %bb.3
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bb.2 (%ir-block.0):
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liveins: $f0s, $f1s
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renamable $r1d = LARL %const.0
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renamable $f1s = LE killed renamable $r1d, 0, $noreg :: (load (s32) from constant-pool)
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bb.3 (%ir-block.0):
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liveins: $r2d
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Return
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...
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