a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
113 lines
3.0 KiB
LLVM
113 lines
3.0 KiB
LLVM
; Test 64-bit addition in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i64 @foo()
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; Check addition of 1.
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define zeroext i1 @f1(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f1:
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; CHECK: algfi %r3, 1
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; CHECK-DAG: stg %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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ret i1 %obit
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}
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; Check the high end of the ALGFI range.
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define zeroext i1 @f2(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f2:
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; CHECK: algfi %r3, 4294967295
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; CHECK-DAG: stg %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967295)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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ret i1 %obit
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}
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; Check the next value up, which must be loaded into a register first.
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define zeroext i1 @f3(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f3:
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; CHECK: llihl [[REG1:%r[0-9]+]], 1
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; CHECK: algr [[REG1]], %r3
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967296)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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ret i1 %obit
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}
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; Likewise for negative values.
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define zeroext i1 @f4(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f4:
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; CHECK: lghi [[REG1:%r[0-9]+]], -1
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; CHECK: algr [[REG1]], %r3
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; CHECK-DAG: stg [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 -1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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ret i1 %obit
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}
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; Check using the overflow result for a branch.
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define void @f5(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f5:
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; CHECK: algfi %r3, 1
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; CHECK: stg %r3, 0(%r4)
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; CHECK: jgnle foo@PLT
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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br i1 %obit, label %call, label %exit
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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define void @f6(i64 %dummy, i64 %a, ptr %res) {
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; CHECK-LABEL: f6:
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; CHECK: algfi %r3, 1
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; CHECK: stg %r3, 0(%r4)
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; CHECK: jgle foo@PLT
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; CHECK: br %r14
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
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%val = extractvalue {i64, i1} %t, 0
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%obit = extractvalue {i64, i1} %t, 1
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store i64 %val, ptr %res
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br i1 %obit, label %exit, label %call
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call:
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tail call i64 @foo()
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br label %exit
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exit:
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ret void
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}
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declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
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