a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
96 lines
2.6 KiB
LLVM
96 lines
2.6 KiB
LLVM
; Test stores of byte-swapped vector elements.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
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declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
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declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
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declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
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; Test v8i16 stores.
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define void @f1(<8 x i16> %val, ptr %ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vstbrh %v24, 0(%r2)
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; CHECK: br %r14
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%swap = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %val)
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store <8 x i16> %swap, ptr %ptr
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ret void
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}
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; Test v4i32 stores.
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define void @f2(<4 x i32> %val, ptr %ptr) {
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; CHECK-LABEL: f2:
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; CHECK: vstbrf %v24, 0(%r2)
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; CHECK: br %r14
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %ptr
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ret void
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}
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; Test v2i64 stores.
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define void @f3(<2 x i64> %val, ptr %ptr) {
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; CHECK-LABEL: f3:
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; CHECK: vstbrg %v24, 0(%r2)
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; CHECK: br %r14
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%swap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val)
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store <2 x i64> %swap, ptr %ptr
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ret void
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}
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; Test the highest aligned in-range offset.
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define void @f4(<4 x i32> %val, ptr %base) {
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; CHECK-LABEL: f4:
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; CHECK: vstbrf %v24, 4080(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <4 x i32>, ptr %base, i64 255
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %ptr
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ret void
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}
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; Test the highest unaligned in-range offset.
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define void @f5(<4 x i32> %val, ptr %base) {
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; CHECK-LABEL: f5:
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; CHECK: vstbrf %v24, 4095(%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, ptr %base, i64 4095
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %addr, align 1
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ret void
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}
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; Test the next offset up, which requires separate address logic,
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define void @f6(<4 x i32> %val, ptr %base) {
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; CHECK-LABEL: f6:
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; CHECK: aghi %r2, 4096
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; CHECK: vstbrf %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <4 x i32>, ptr %base, i64 256
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %ptr
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ret void
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}
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; Test negative offsets, which also require separate address logic,
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define void @f7(<4 x i32> %val, ptr %base) {
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; CHECK-LABEL: f7:
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; CHECK: aghi %r2, -16
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; CHECK: vstbrf %v24, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr <4 x i32>, ptr %base, i64 -1
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %ptr
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ret void
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}
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; Check that indexes are allowed.
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define void @f8(<4 x i32> %val, ptr %base, i64 %index) {
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; CHECK-LABEL: f8:
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; CHECK: vstbrf %v24, 0(%r3,%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, ptr %base, i64 %index
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%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val)
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store <4 x i32> %swap, ptr %addr, align 1
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ret void
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}
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