1283ccb610
The recently announced IBM z16 processor implements the architecture already supported as "arch14" in LLVM. This patch adds support for "z16" as an alternate architecture name for arch14.
55 lines
1.5 KiB
LLVM
55 lines
1.5 KiB
LLVM
; Test vector intrinsics added with z16.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 | FileCheck %s
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declare <4 x float> @llvm.s390.vclfnhs(<8 x i16>, i32)
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declare <4 x float> @llvm.s390.vclfnls(<8 x i16>, i32)
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declare <8 x i16> @llvm.s390.vcrnfs(<4 x float>, <4 x float>, i32)
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declare <8 x i16> @llvm.s390.vcfn(<8 x i16>, i32)
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declare <8 x i16> @llvm.s390.vcnf(<8 x i16>, i32)
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; VCLFNH.
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define <4 x float> @test_vclfnhs(<8 x i16> %a) {
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; CHECK-LABEL: test_vclfnhs:
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; CHECK: vclfnh %v24, %v24, 2, 0
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; CHECK: br %r14
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%res = call <4 x float> @llvm.s390.vclfnhs(<8 x i16> %a, i32 0)
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ret <4 x float> %res
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}
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; VCLFNL.
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define <4 x float> @test_vclfnls(<8 x i16> %a) {
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; CHECK-LABEL: test_vclfnls:
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; CHECK: vclfnl %v24, %v24, 2, 0
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; CHECK: br %r14
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%res = call <4 x float> @llvm.s390.vclfnls(<8 x i16> %a, i32 0)
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ret <4 x float> %res
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}
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; VCRNF.
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define <8 x i16> @test_vcrnfs(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: test_vcrnfs:
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; CHECK: vcrnf %v24, %v24, %v26, 0, 2
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; CHECK: br %r14
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%res = call <8 x i16> @llvm.s390.vcrnfs(<4 x float> %a, <4 x float> %b, i32 0)
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ret <8 x i16> %res
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}
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; VCFN.
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define <8 x i16> @test_vcfn(<8 x i16> %a) {
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; CHECK-LABEL: test_vcfn:
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; CHECK: vcfn %v24, %v24, 1, 0
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; CHECK: br %r14
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%res = call <8 x i16> @llvm.s390.vcfn(<8 x i16> %a, i32 0)
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ret <8 x i16> %res
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}
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; VCNF.
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define <8 x i16> @test_vcnf(<8 x i16> %a) {
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; CHECK-LABEL: test_vcnf:
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; CHECK: vcnf %v24, %v24, 0, 1
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; CHECK: br %r14
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%res = call <8 x i16> @llvm.s390.vcnf(<8 x i16> %a, i32 0)
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ret <8 x i16> %res
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}
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