189900eb14
This stops reporting CostPerUse 1 for `R8`-`R15` and `XMM8`-`XMM31`.
This was previously done because instruction encoding require a REX
prefix when using them resulting in longer instruction encodings. I
found that this regresses the quality of the register allocation as the
costs impose an ordering on eviction candidates. I also feel that there
is a bit of an impedance mismatch as the actual costs occure when
encoding instructions using those registers, but the order of VReg
assignments is not primarily ordered by number of Defs+Uses.
I did extensive measurements with the llvm-test-suite wiht SPEC2006 +
SPEC2017 included, internal services showed similar patterns. Generally
there are a log of improvements but also a lot of regression. But on
average the allocation quality seems to improve at a small code size
regression.
Results for measuring static and dynamic instruction counts:
Dynamic Counts (scaled by execution frequency) / Optimization Remarks:
Spills+FoldedSpills -5.6%
Reloads+FoldedReloads -4.2%
Copies -0.1%
Static / LLVM Statistics:
regalloc.NumSpills mean -1.6%, geomean -2.8%
regalloc.NumReloads mean -1.7%, geomean -3.1%
size..text mean +0.4%, geomean +0.4%
Static / LLVM Statistics:
mean -2.2%, geomean -3.1%) regalloc.NumSpills
mean -2.6%, geomean -3.9%) regalloc.NumReloads
mean +0.6%, geomean +0.6%) size..text
Static / LLVM Statistics:
regalloc.NumSpills mean -3.0%
regalloc.NumReloads mean -3.3%
size..text mean +0.3%, geomean +0.3%
Differential Revision: https://reviews.llvm.org/D133902
138 lines
4.7 KiB
LLVM
138 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse \
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; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse \
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; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=-sse \
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; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=NOSSE
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=-sse \
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; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=NOSSE
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define void @test_select(ptr %p, ptr %q, i1 zeroext %c) {
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; SSE-LABEL: test_select:
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; SSE: # %bb.0:
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; SSE-NEXT: testl %edx, %edx
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; SSE-NEXT: jne .LBB0_1
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; SSE-NEXT: # %bb.2:
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; SSE-NEXT: movaps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE-NEXT: movaps %xmm0, (%rsi)
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; SSE-NEXT: retq
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; SSE-NEXT: .LBB0_1:
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; SSE-NEXT: movups (%rdi), %xmm0
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; SSE-NEXT: movaps %xmm0, (%rsi)
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; SSE-NEXT: retq
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;
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; NOSSE-LABEL: test_select:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: xorl %eax, %eax
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; NOSSE-NEXT: testl %edx, %edx
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; NOSSE-NEXT: cmovneq (%rdi), %rax
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; NOSSE-NEXT: movabsq $9223231299366420480, %rcx # imm = 0x7FFF800000000000
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; NOSSE-NEXT: cmovneq 8(%rdi), %rcx
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; NOSSE-NEXT: movq %rcx, 8(%rsi)
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; NOSSE-NEXT: movq %rax, (%rsi)
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; NOSSE-NEXT: retq
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%a = load fp128, ptr %p, align 2
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%r = select i1 %c, fp128 %a, fp128 0xL00000000000000007FFF800000000000
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store fp128 %r, ptr %q
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ret void
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}
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; The uitofp will become a select_cc. This used to crash during type
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; legalization because we didn't expect the operands to need to be softened.
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define fp128 @test_select_cc(fp128, fp128) {
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; SSE-LABEL: test_select_cc:
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; SSE: # %bb.0: # %BB0
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; SSE-NEXT: pushq %rbx
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; SSE-NEXT: .cfi_def_cfa_offset 16
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; SSE-NEXT: subq $32, %rsp
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; SSE-NEXT: .cfi_def_cfa_offset 48
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; SSE-NEXT: .cfi_offset %rbx, -16
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; SSE-NEXT: movaps %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; SSE-NEXT: callq __netf2@PLT
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; SSE-NEXT: movl %eax, %ebx
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; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
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; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
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; SSE-NEXT: callq __eqtf2@PLT
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; SSE-NEXT: testl %eax, %eax
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; SSE-NEXT: je .LBB1_1
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; SSE-NEXT: # %bb.2: # %BB0
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; SSE-NEXT: xorps %xmm1, %xmm1
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; SSE-NEXT: jmp .LBB1_3
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; SSE-NEXT: .LBB1_1:
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; SSE-NEXT: movaps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; SSE-NEXT: .LBB1_3: # %BB0
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; SSE-NEXT: testl %ebx, %ebx
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; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
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; SSE-NEXT: jne .LBB1_5
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; SSE-NEXT: # %bb.4: # %BB1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: .LBB1_5: # %BB2
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; SSE-NEXT: addq $32, %rsp
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; SSE-NEXT: .cfi_def_cfa_offset 16
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; SSE-NEXT: popq %rbx
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; SSE-NEXT: .cfi_def_cfa_offset 8
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; SSE-NEXT: retq
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;
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; NOSSE-LABEL: test_select_cc:
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; NOSSE: # %bb.0: # %BB0
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; NOSSE-NEXT: pushq %rbp
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; NOSSE-NEXT: .cfi_def_cfa_offset 16
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; NOSSE-NEXT: pushq %r15
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; NOSSE-NEXT: .cfi_def_cfa_offset 24
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; NOSSE-NEXT: pushq %r14
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; NOSSE-NEXT: .cfi_def_cfa_offset 32
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; NOSSE-NEXT: pushq %r12
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; NOSSE-NEXT: .cfi_def_cfa_offset 40
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; NOSSE-NEXT: pushq %rbx
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; NOSSE-NEXT: .cfi_def_cfa_offset 48
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; NOSSE-NEXT: .cfi_offset %rbx, -48
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; NOSSE-NEXT: .cfi_offset %r12, -40
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; NOSSE-NEXT: .cfi_offset %r14, -32
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; NOSSE-NEXT: .cfi_offset %r15, -24
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; NOSSE-NEXT: .cfi_offset %rbp, -16
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; NOSSE-NEXT: movq %rcx, %r15
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; NOSSE-NEXT: movq %rdx, %r12
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; NOSSE-NEXT: movq %rsi, %rbx
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; NOSSE-NEXT: movq %rdi, %r14
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; NOSSE-NEXT: callq __netf2@PLT
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; NOSSE-NEXT: movl %eax, %ebp
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; NOSSE-NEXT: movq %r14, %rdi
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; NOSSE-NEXT: movq %rbx, %rsi
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; NOSSE-NEXT: movq %r12, %rdx
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; NOSSE-NEXT: movq %r15, %rcx
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; NOSSE-NEXT: callq __eqtf2@PLT
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; NOSSE-NEXT: movl %eax, %ecx
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; NOSSE-NEXT: xorl %eax, %eax
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; NOSSE-NEXT: testl %ecx, %ecx
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; NOSSE-NEXT: movabsq $4611404543450677248, %rdx # imm = 0x3FFF000000000000
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; NOSSE-NEXT: cmovneq %rax, %rdx
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; NOSSE-NEXT: testl %ebp, %ebp
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; NOSSE-NEXT: je .LBB1_2
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; NOSSE-NEXT: # %bb.1:
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; NOSSE-NEXT: movq %r14, %rax
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; NOSSE-NEXT: movq %rbx, %rdx
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; NOSSE-NEXT: .LBB1_2: # %BB2
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; NOSSE-NEXT: popq %rbx
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; NOSSE-NEXT: .cfi_def_cfa_offset 40
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; NOSSE-NEXT: popq %r12
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; NOSSE-NEXT: .cfi_def_cfa_offset 32
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; NOSSE-NEXT: popq %r14
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; NOSSE-NEXT: .cfi_def_cfa_offset 24
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; NOSSE-NEXT: popq %r15
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; NOSSE-NEXT: .cfi_def_cfa_offset 16
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; NOSSE-NEXT: popq %rbp
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: retq
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BB0:
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%a = fcmp oeq fp128 %0, %1
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%b = uitofp i1 %a to fp128
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br i1 %a, label %BB1, label %BB2
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BB1:
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br label %BB2
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BB2:
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%c = phi fp128 [ %0, %BB0 ], [ %b, %BB1 ]
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ret fp128 %c
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}
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