d9e51e7552
NVPTX/dont-introduce-addrspacecast.ll required manually removing a check for a bitcast. AArch64/combine-address-mode.ll required rerunning update_test_checks Mips required some manual updates due to a CHECK-NEXT coming after a deleted bitcast. ARM/sink-addrmode.ll needed one small manual fix. Excludes one X86 function which needs more attention.
44 lines
2.1 KiB
LLVM
44 lines
2.1 KiB
LLVM
; RUN: opt -codegenprepare -mtriple=arm7-unknown-unknown -S < %s | FileCheck %s
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declare void @llvm.memcpy.p0.p0.i32(ptr, ptr, i32, i1) nounwind
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declare void @llvm.memmove.p0.p0.i32(ptr, ptr, i32, i1) nounwind
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declare void @llvm.memset.p0.i32(ptr, i8, i32, i1) nounwind
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define void @test_memcpy(ptr align 4 %dst, ptr align 8 %src, i32 %N) {
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; CHECK-LABEL: @test_memcpy
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; CHECK: call void @llvm.memcpy.p0.p0.i32(ptr align 4 %dst, ptr align 8 %src, i32 %N, i1 false)
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; CHECK: call void @llvm.memcpy.p0.p0.i32(ptr align 4 %dst, ptr align 8 %src, i32 %N, i1 false)
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; CHECK: call void @llvm.memcpy.p0.p0.i32(ptr align 8 %dst, ptr align 16 %src, i32 %N, i1 false)
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entry:
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call void @llvm.memcpy.p0.p0.i32(ptr %dst, ptr %src, i32 %N, i1 false)
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call void @llvm.memcpy.p0.p0.i32(ptr align 2 %dst, ptr align 2 %src, i32 %N, i1 false)
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call void @llvm.memcpy.p0.p0.i32(ptr align 8 %dst, ptr align 16 %src, i32 %N, i1 false)
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ret void
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}
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define void @test_memmove(ptr align 4 %dst, ptr align 8 %src, i32 %N) {
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; CHECK-LABEL: @test_memmove
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; CHECK: call void @llvm.memmove.p0.p0.i32(ptr align 4 %dst, ptr align 8 %src, i32 %N, i1 false)
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; CHECK: call void @llvm.memmove.p0.p0.i32(ptr align 4 %dst, ptr align 8 %src, i32 %N, i1 false)
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; CHECK: call void @llvm.memmove.p0.p0.i32(ptr align 8 %dst, ptr align 16 %src, i32 %N, i1 false)
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entry:
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call void @llvm.memmove.p0.p0.i32(ptr %dst, ptr %src, i32 %N, i1 false)
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call void @llvm.memmove.p0.p0.i32(ptr align 2 %dst, ptr align 2 %src, i32 %N, i1 false)
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call void @llvm.memmove.p0.p0.i32(ptr align 8 %dst, ptr align 16 %src, i32 %N, i1 false)
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ret void
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}
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define void @test_memset(ptr align 4 %dst, i8 %val, i32 %N) {
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; CHECK-LABEL: @test_memset
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; CHECK: call void @llvm.memset.p0.i32(ptr align 4 %dst, i8 %val, i32 %N, i1 false)
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; CHECK: call void @llvm.memset.p0.i32(ptr align 4 %dst, i8 %val, i32 %N, i1 false)
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; CHECK: call void @llvm.memset.p0.i32(ptr align 8 %dst, i8 %val, i32 %N, i1 false)
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entry:
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call void @llvm.memset.p0.i32(ptr %dst, i8 %val, i32 %N, i1 false)
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call void @llvm.memset.p0.i32(ptr align 2 %dst, i8 %val, i32 %N, i1 false)
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call void @llvm.memset.p0.i32(ptr align 8 %dst, i8 %val, i32 %N, i1 false)
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ret void
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}
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