362c23500a
This reverts commit 6eae6b3722.
This version of the patch results in the same DFSAN bot failure as before,
so my guess about the SimplifyQuery context instruction was wrong.
I don't know what the real bug is.
324 lines
9.5 KiB
LLVM
324 lines
9.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=instcombine -S | FileCheck %s
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declare void @use(i32)
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declare void @use_f32(float)
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declare void @use_v2f16(<2 x half>)
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declare void @use_v2i8(<2 x i8>)
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define i32 @test1(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 [[Y:%.*]]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %sub, i32 %y
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%add = add i32 %cond, %x
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ret i32 %add
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}
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define i32 @test2(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 [[X]]
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %sub, i32 %x
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%add = add i32 %cond, %x
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ret i32 %add
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}
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define i32 @test3(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 1
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[MUL]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %sub, i32 1
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%mul = mul i32 %cond, %x
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ret i32 %mul
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}
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define i32 @test4(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[SUB]], i32 1
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[MUL]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %sub, i32 1
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%mul = mul i32 %cond, %x
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ret i32 %mul
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}
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define i32 @test5(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[X:%.*]], i32 0
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%cond = select i1 %c, i32 %x, i32 0
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%add = add i32 %cond, %x
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ret i32 %add
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}
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define i32 @test6(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 7, i32 [[X:%.*]]
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%cond = select i1 %c, i32 7, i32 %x
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%and = and i32 %cond, %x
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ret i32 %and
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}
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define i32 @test7(i1 %c, i32 %x) {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[X]], i32 [[SUB]]
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; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[X]], [[COND]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %x, i32 %sub
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%div = sdiv i32 %x, %cond
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ret i32 %div
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}
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define i32 @test8(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 7, i32 [[Y:%.*]]
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; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 42, [[COND]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%cond = select i1 %c, i32 7, i32 %y
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%div = sdiv i32 42, %cond
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ret i32 %div
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}
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define i32 @test9(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 1, i32 [[X:%.*]]
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[COND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%cond = select i1 %c, i32 1, i32 %x
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%sub = sub nsw i32 0, %cond
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ret i32 %sub
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}
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define i32 @test10(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 7, i32 [[Y:%.*]]
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; CHECK-NEXT: [[DIV:%.*]] = udiv i32 42, [[COND]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%cond = select i1 %c, i32 7, i32 %y
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%div = udiv i32 42, %cond
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ret i32 %div
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}
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define i32 @test11(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 7, i32 [[Y:%.*]]
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; CHECK-NEXT: [[DIV:%.*]] = srem i32 42, [[COND]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%cond = select i1 %c, i32 7, i32 %y
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%div = srem i32 42, %cond
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ret i32 %div
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}
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define i32 @test12(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 7, i32 [[Y:%.*]]
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; CHECK-NEXT: [[DIV:%.*]] = urem i32 42, [[COND]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%cond = select i1 %c, i32 7, i32 %y
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%div = urem i32 42, %cond
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ret i32 %div
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}
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define i32 @extra_use(i1 %c, i32 %x, i32 %y) {
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; CHECK-LABEL: @extra_use(
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 1, i32 [[X:%.*]]
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; CHECK-NEXT: tail call void @use(i32 [[COND]])
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[COND]]
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; CHECK-NEXT: ret i32 [[SUB]]
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;
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%cond = select i1 %c, i32 1, i32 %x
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tail call void @use(i32 %cond)
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%sub = sub nsw i32 0, %cond
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ret i32 %sub
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}
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define i32 @extra_use2(i1 %c, i32 %x) {
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; CHECK-LABEL: @extra_use2(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[C:%.*]], i32 [[X]], i32 [[SUB]]
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; CHECK-NEXT: tail call void @use(i32 [[COND]])
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; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[COND]], [[X]]
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; CHECK-NEXT: ret i32 [[DIV]]
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;
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%sub = sub i32 0, %x
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%cond = select i1 %c, i32 %x, i32 %sub
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tail call void @use(i32 %cond)
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%div = sdiv i32 %cond, %x
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ret i32 %div
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}
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define i32 @and_sel_op0(i1 %b) {
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; CHECK-LABEL: @and_sel_op0(
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; CHECK-NEXT: [[S:%.*]] = zext i1 [[B:%.*]] to i32
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; CHECK-NEXT: ret i32 [[S]]
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;
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%s = select i1 %b, i32 25, i32 0
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%r = and i32 %s, 1
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ret i32 %r
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}
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define i32 @and_sel_op0_use(i1 %b) {
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; CHECK-LABEL: @and_sel_op0_use(
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 25, i32 0
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[R:%.*]] = and i32 [[S]], 1
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s = select i1 %b, i32 25, i32 0
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call void @use(i32 %s)
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%r = and i32 %s, 1
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ret i32 %r
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}
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define i32 @mul_sel_op0(i1 %b, i32 %x) {
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; CHECK-LABEL: @mul_sel_op0(
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; CHECK-NEXT: [[R:%.*]] = select i1 [[B:%.*]], i32 0, i32 42
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; CHECK-NEXT: ret i32 [[R]]
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;
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%d = udiv exact i32 42, %x
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%s = select i1 %b, i32 0, i32 %d
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%r = mul i32 %s, %x
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ret i32 %r
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}
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define i32 @mul_sel_op0_use(i1 %b, i32 %x) {
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; CHECK-LABEL: @mul_sel_op0_use(
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; CHECK-NEXT: [[D:%.*]] = udiv exact i32 42, [[X:%.*]]
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 0, i32 [[D]]
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[R:%.*]] = mul i32 [[S]], [[X]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%d = udiv exact i32 42, %x
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%s = select i1 %b, i32 0, i32 %d
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call void @use(i32 %s)
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%r = mul i32 %s, %x
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ret i32 %r
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}
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define i32 @sub_sel_op1(i1 %b) {
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; CHECK-LABEL: @sub_sel_op1(
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; CHECK-NEXT: [[NOT_B:%.*]] = xor i1 [[B:%.*]], true
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; CHECK-NEXT: [[R:%.*]] = zext i1 [[NOT_B]] to i32
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s = select i1 %b, i32 42, i32 41
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%r = sub nsw i32 42, %s
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ret i32 %r
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}
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define i32 @sub_sel_op1_use(i1 %b) {
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; CHECK-LABEL: @sub_sel_op1_use(
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 42, i32 41
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[R:%.*]] = sub nsw i32 42, [[S]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s = select i1 %b, i32 42, i32 41
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call void @use(i32 %s)
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%r = sub nsw i32 42, %s
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ret i32 %r
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}
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define float @fadd_sel_op0(i1 %b, float %x) {
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; CHECK-LABEL: @fadd_sel_op0(
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; CHECK-NEXT: [[R:%.*]] = select nnan i1 [[B:%.*]], float 0xFFF0000000000000, float 0x7FF0000000000000
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; CHECK-NEXT: ret float [[R]]
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;
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%s = select i1 %b, float 0xFFF0000000000000, float 0x7FF0000000000000
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%r = fadd nnan float %s, %x
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ret float %r
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}
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define float @fadd_sel_op0_use(i1 %b, float %x) {
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; CHECK-LABEL: @fadd_sel_op0_use(
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], float 0xFFF0000000000000, float 0x7FF0000000000000
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; CHECK-NEXT: call void @use_f32(float [[S]])
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; CHECK-NEXT: [[R:%.*]] = fadd nnan float [[S]], [[X:%.*]]
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; CHECK-NEXT: ret float [[R]]
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;
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%s = select i1 %b, float 0xFFF0000000000000, float 0x7FF0000000000000
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call void @use_f32(float %s)
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%r = fadd nnan float %s, %x
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ret float %r
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}
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define <2 x half> @fmul_sel_op1(i1 %b, <2 x half> %p) {
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; CHECK-LABEL: @fmul_sel_op1(
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; CHECK-NEXT: ret <2 x half> zeroinitializer
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;
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%x = fadd <2 x half> %p, <half 1.0, half 2.0> ; thwart complexity-based canonicalization
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%s = select i1 %b, <2 x half> zeroinitializer, <2 x half> <half 0xHffff, half 0xHffff>
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%r = fmul nnan nsz <2 x half> %x, %s
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ret <2 x half> %r
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}
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define <2 x half> @fmul_sel_op1_use(i1 %b, <2 x half> %p) {
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; CHECK-LABEL: @fmul_sel_op1_use(
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; CHECK-NEXT: [[X:%.*]] = fadd <2 x half> [[P:%.*]], <half 0xH3C00, half 0xH4000>
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], <2 x half> zeroinitializer, <2 x half> <half 0xHFFFF, half 0xHFFFF>
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; CHECK-NEXT: call void @use_v2f16(<2 x half> [[S]])
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; CHECK-NEXT: [[R:%.*]] = fmul nnan nsz <2 x half> [[X]], [[S]]
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; CHECK-NEXT: ret <2 x half> [[R]]
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;
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%x = fadd <2 x half> %p, <half 1.0, half 2.0> ; thwart complexity-based canonicalization
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%s = select i1 %b, <2 x half> zeroinitializer, <2 x half> <half 0xHffff, half 0xHffff>
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call void @use_v2f16(<2 x half> %s)
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%r = fmul nnan nsz <2 x half> %x, %s
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ret <2 x half> %r
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}
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define i32 @ashr_sel_op1(i1 %b) {
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; CHECK-LABEL: @ashr_sel_op1(
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; CHECK-NEXT: [[R:%.*]] = select i1 [[B:%.*]], i32 -1, i32 -2
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s = select i1 %b, i32 2, i32 0
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%r = ashr i32 -2, %s
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ret i32 %r
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}
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define i32 @ashr_sel_op1_use(i1 %b) {
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; CHECK-LABEL: @ashr_sel_op1_use(
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; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 2, i32 0
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; CHECK-NEXT: call void @use(i32 [[S]])
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; CHECK-NEXT: [[R:%.*]] = ashr i32 -2, [[S]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%s = select i1 %b, i32 2, i32 0
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call void @use(i32 %s)
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%r = ashr i32 -2, %s
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ret i32 %r
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}
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