3ebc6bee6b
The pattern generalizes a tensor::UnPackOp into a sequence of tensor + Linalg ops, when the outer dims are all 1s. It uses the trick of rank-reduced tensor.extract_slice to get the tile; transpose the tile; extract sub tile for incomplete cases if needed; use tensor.insert_slice to insert it to the destination tensor. Reviewed By: tyb0807, chelini Differential Revision: https://reviews.llvm.org/D140254
890 lines
37 KiB
C++
890 lines
37 KiB
C++
//===- Transforms.cpp - Linalg transformations as patterns ----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements logic and helpers to expose Linalg transforms as rewrite
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// patterns.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Linalg/Transforms/Transforms.h"
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#include "mlir/Dialect/Affine/IR/AffineOps.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h"
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#include "mlir/Dialect/Linalg/IR/Linalg.h"
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#include "mlir/Dialect/Linalg/Transforms/HoistPadding.h"
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#include "mlir/Dialect/Linalg/Utils/Utils.h"
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#include "mlir/Dialect/SCF/Transforms/Transforms.h"
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#include "mlir/Dialect/Tensor/IR/Tensor.h"
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#include "mlir/Dialect/Tensor/IR/TensorTilingInterfaceImpl.h"
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#include "mlir/Dialect/Tensor/Utils/Utils.h"
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#include "mlir/Dialect/Utils/IndexingUtils.h"
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#include "mlir/Dialect/Utils/StaticValueUtils.h"
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#include "mlir/Dialect/Utils/StructuredOpsUtils.h"
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#include "mlir/Dialect/Vector/IR/VectorOps.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Support/LLVM.h"
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#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
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#include "llvm/ADT/ScopeExit.h"
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#include "llvm/ADT/TypeSwitch.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <type_traits>
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#include <utility>
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#define DEBUG_TYPE "linalg-transforms"
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using namespace mlir;
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using namespace mlir::linalg;
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#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE << "]: ")
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//===----------------------------------------------------------------------===//
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// Transformations exposed as rewrite patterns.
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//===----------------------------------------------------------------------===//
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LinalgTilingOptions &
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mlir::linalg::LinalgTilingOptions::setTileSizes(ArrayRef<int64_t> ts) {
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assert(!tileSizeComputationFunction && "tile sizes already set");
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SmallVector<int64_t, 4> tileSizes(ts.begin(), ts.end());
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tileSizeComputationFunction = [tileSizes](OpBuilder &b, Operation *op) {
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OpBuilder::InsertionGuard guard(b);
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b.setInsertionPointToStart(
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&op->getParentOfType<func::FuncOp>().getBody().front());
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return llvm::to_vector<4>(map_range(tileSizes, [&](int64_t s) {
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Value v = b.create<arith::ConstantIndexOp>(op->getLoc(), s);
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return v;
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}));
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};
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return *this;
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}
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/// Pad the `opOperand` in the `paddingDimensions` using the padding value and
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/// the nofold flag found in `paddingValues` and `packPaddings`, respectively.
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/// Exit early and return the `opOperand` value if the shape dimensions that
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/// match `paddingDimensions` have a static size and the nofold flag is not set.
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/// Otherwise, try to pad the shape dimensions that match the iterator
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/// dimensions `paddingDimensions` and return the tensor::PadOp result if
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/// padding succeeds or failure otherwise.
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static FailureOr<Value> padOperandToSmallestStaticBoundingBox(
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OpBuilder &b, linalg::LinalgOp opToPad, OpOperand *opOperand,
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ArrayRef<int64_t> paddingDimensions, ArrayRef<Attribute> paddingValues,
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ArrayRef<bool> packPaddings) {
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AffineMap indexingMap = opToPad.getMatchingIndexingMap(opOperand);
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ArrayRef<int64_t> shape = opToPad.getShape(opOperand);
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// Collect the shape dimension that are a function of the `paddingDimensions`.
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llvm::SmallDenseSet<int64_t> shapeDimsToPad;
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for (int64_t dim : paddingDimensions)
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for (const auto &en : enumerate(indexingMap.getResults()))
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if (en.value().isFunctionOfDim(dim))
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shapeDimsToPad.insert(en.index());
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// Return the unpadded operand if padding to a static shape is not needed and
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// if the nofold flag is not set.
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bool nofold = opOperand->getOperandNumber() < packPaddings.size()
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? packPaddings[opOperand->getOperandNumber()]
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: false;
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bool hasStaticShape = llvm::none_of(shapeDimsToPad, [&](int64_t dim) {
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return ShapedType::isDynamic(shape[dim]);
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});
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if (!nofold && hasStaticShape)
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return opOperand->get();
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// Fail if `paddingValues` specifies no padding value.
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if (opOperand->getOperandNumber() >= paddingValues.size())
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return failure();
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Attribute paddingAttr = paddingValues[opOperand->getOperandNumber()];
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Type paddingType = b.getType<NoneType>();
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if (auto typedAttr = paddingAttr.dyn_cast<TypedAttr>())
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paddingType = typedAttr.getType();
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Value paddingValue =
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b.create<arith::ConstantOp>(opToPad.getLoc(), paddingType, paddingAttr);
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// Follow the use-def chain if `currOpOperand` is defined by a LinalgOp.
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OpOperand *currOpOperand = opOperand;
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while (auto linalgOp = currOpOperand->get().getDefiningOp<LinalgOp>()) {
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OpResult result = currOpOperand->get().cast<OpResult>();
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currOpOperand = linalgOp.getDpsInitOperand(result.getResultNumber());
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}
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// Fail if `currOpOperand` is not defined by an ExtractSliceOp.
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auto sliceOp = currOpOperand->get().getDefiningOp<tensor::ExtractSliceOp>();
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if (!sliceOp)
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return failure();
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// Compute the dropped dimensions if `sliceOp` is ranke-reducing.
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llvm::SmallBitVector droppedDims = sliceOp.getDroppedDims();
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OffsetSizeAndStrideOpInterface shapedOp = sliceOp;
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// Upper bound the `sliceOp` sizes to obtain a static bounding box.
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SmallVector<int64_t> paddedShape(shape.begin(), shape.end());
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int64_t shapeIdx = 0;
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for (const auto &en : enumerate(shapedOp.getMixedSizes())) {
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// Skip dropped dimensions.
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if (droppedDims.test(en.index()))
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continue;
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// Skip dimensions that do not require padding.
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if (!shapeDimsToPad.contains(shapeIdx)) {
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shapeIdx++;
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continue;
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}
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// If the size is an attribute add it directly to `paddedShape`.
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if (en.value().is<Attribute>()) {
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paddedShape[shapeIdx++] =
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en.value().get<Attribute>().dyn_cast<IntegerAttr>().getInt();
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continue;
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}
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// Otherwise, try to compute a constant upper bound for the size value.
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FailureOr<int64_t> upperBound =
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getConstantUpperBoundForIndex(en.value().get<Value>());
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if (failed(upperBound)) {
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LLVM_DEBUG(DBGS() << "No constant bounding box can be found for padding");
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return failure();
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}
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paddedShape[shapeIdx++] = *upperBound;
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}
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assert(shapeIdx == static_cast<int64_t>(shape.size()) &&
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"expect the dynamic and static ranks to match");
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// Pad the operand to the bounding box defined by `paddedShape`.
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auto paddedTensorType = RankedTensorType::get(
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paddedShape, getElementTypeOrSelf(opOperand->get()));
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return makeComposedPadHighOp(b, opToPad->getLoc(), paddedTensorType,
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opOperand->get(), paddingValue, nofold);
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}
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FailureOr<SmallVector<Value>>
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linalg::rewriteAsPaddedOp(OpBuilder &b, LinalgOp opToPad,
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ArrayRef<int64_t> paddingDimensions,
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ArrayRef<Attribute> paddingValues,
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ArrayRef<bool> packPaddings, LinalgOp &paddedOp) {
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Location loc = opToPad->getLoc();
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// TODO: there are cases where we may still want to pad to larger sizes.
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assert(opToPad.hasTensorSemantics() &&
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"expected operation to have tensor semantics");
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OpBuilder::InsertionGuard g(b);
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// Set IP after op because we also take the dims of the original output.
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b.setInsertionPointAfter(opToPad);
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// Make a copy of the shaped operands and update it.
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SmallVector<Value> newOperands;
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newOperands.reserve(opToPad->getNumOperands());
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for (OpOperand &opOperand : opToPad->getOpOperands()) {
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FailureOr<Value> paddedOperand = padOperandToSmallestStaticBoundingBox(
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b, opToPad, &opOperand, paddingDimensions, paddingValues, packPaddings);
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// Exit if `paddingDimensions` cannot be bounded statically.
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if (failed(paddedOperand))
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return failure();
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newOperands.push_back(*paddedOperand);
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}
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SmallVector<SmallVector<Value>> reifiedResultShapes;
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if (failed(cast<ReifyRankedShapedTypeOpInterface>(opToPad.getOperation())
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.reifyResultShapes(b, reifiedResultShapes)))
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return failure();
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assert(reifiedResultShapes.size() == opToPad->getNumResults() &&
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"expected same number of results");
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// Clone `opToPad` to operate on the statically padded shapes.
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auto resultTensorTypes =
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ValueRange(newOperands).take_back(opToPad.getNumDpsInits()).getTypes();
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paddedOp = clone(b, opToPad, resultTensorTypes, newOperands);
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// Recover the slice out of the new static results. This keeps the original
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// linalg op around because it uses the dims of the original results.
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SmallVector<Value> paddedSubviewResults;
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paddedSubviewResults.reserve(opToPad->getNumResults());
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for (const auto &en : llvm::enumerate(paddedOp->getResults())) {
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Value paddedResult = en.value();
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int64_t resultNumber = en.index();
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int64_t rank = paddedResult.getType().cast<RankedTensorType>().getRank();
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SmallVector<OpFoldResult> offsets(rank, b.getIndexAttr(0));
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SmallVector<OpFoldResult> sizes;
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for (Value v : reifiedResultShapes[resultNumber])
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sizes.push_back(getAsOpFoldResult(v));
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SmallVector<OpFoldResult> strides(rank, b.getIndexAttr(1));
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paddedSubviewResults.push_back(b.create<tensor::ExtractSliceOp>(
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loc, paddedResult, offsets, sizes, strides));
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}
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return paddedSubviewResults;
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}
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/// Try to peel a loop `op` and return the new result.
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// TODO: Add support for scf.parallel and affine.for loops.
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SmallVector<Value> mlir::linalg::peelLoop(RewriterBase &rewriter,
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Operation *op) {
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return llvm::TypeSwitch<Operation *, SmallVector<Value, 4>>(op)
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.Case<scf::ForOp>([&](scf::ForOp forOp) {
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scf::ForOp partialIteration;
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if (succeeded(scf::peelAndCanonicalizeForLoop(rewriter, forOp,
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partialIteration)))
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return partialIteration->getResults();
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assert(!partialIteration && "expected that loop was not peeled");
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return forOp->getResults();
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})
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.Default([&](Operation *op) { return op->getResults(); });
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}
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/// Peel and canonicalize 'loops'.
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void mlir::linalg::peelLoops(RewriterBase &rewriter,
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ArrayRef<scf::ForOp> loops) {
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for (auto loopOp : loops)
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peelLoop(rewriter, loopOp);
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}
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/// Linalg padding pattern.
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mlir::linalg::LinalgPaddingPattern::LinalgPaddingPattern(
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MLIRContext *context, LinalgPaddingOptions options, PatternBenefit benefit)
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: OpInterfaceRewritePattern<LinalgOp>(context, benefit),
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options(std::move(options)) {}
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FailureOr<LinalgOp>
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mlir::linalg::LinalgPaddingPattern::returningMatchAndRewrite(
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LinalgOp linalgOp, PatternRewriter &rewriter) const {
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if (!linalgOp.hasTensorSemantics())
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return failure();
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// Pad the operation.
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LinalgOp paddedOp;
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FailureOr<SmallVector<Value>> newResults =
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rewriteAsPaddedOp(rewriter, linalgOp, options.paddingDimensions,
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options.paddingValues, options.packPaddings, paddedOp);
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if (failed(newResults))
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return failure();
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// Hoist the padding.
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for (const auto &en : enumerate(options.hoistPaddings)) {
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if (static_cast<int64_t>(en.index()) >= paddedOp->getNumOperands())
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break;
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OpOperand &opOperand = paddedOp->getOpOperand(en.index());
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auto padOp = opOperand.get().getDefiningOp<tensor::PadOp>();
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if (!padOp || en.value() == 0)
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continue;
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// Fail hoisting if the operand shape is not fully static.
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if (llvm::any_of(paddedOp.getShape(&opOperand), ShapedType::isDynamic))
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return failure();
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tensor::PadOp hoistedOp;
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SmallVector<GenericOp> transposeOps;
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SmallVector<int64_t> transposeVector =
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en.index() < options.transposePaddings.size()
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? options.transposePaddings[en.index()]
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: SmallVector<int64_t>{};
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FailureOr<Value> newResult = hoistPaddingOnTensors(
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padOp, en.value(), transposeVector, hoistedOp, transposeOps);
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if (failed(newResult))
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continue;
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rewriter.replaceOp(padOp, *newResult);
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}
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// Replace the original operation to pad.
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rewriter.replaceOp(linalgOp, *newResults);
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return paddedOp;
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}
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LogicalResult mlir::linalg::CopyVectorizationPattern::matchAndRewrite(
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memref::CopyOp copyOp, PatternRewriter &rewriter) const {
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return vectorizeCopy(rewriter, copyOp);
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}
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static SmallVector<utils::IteratorType>
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getNParallelLoopsAttrs(unsigned nParallelLoops) {
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return SmallVector<utils::IteratorType>(nParallelLoops,
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utils::IteratorType::parallel);
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}
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/// Rewrite a tensor::PadOp into a sequence of EmptyOp, FillOp (to
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/// initialize with pad_val) and GenericOp (to copy contents).
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LogicalResult
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PadOpTransformationPattern::matchAndRewrite(tensor::PadOp padOp,
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PatternRewriter &rewriter) const {
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auto inputShapedType = padOp.getSource().getType().cast<ShapedType>();
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auto resultShapedType = padOp.getResult().getType().cast<ShapedType>();
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// Bail on non-static shapes.
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if (!inputShapedType.hasStaticShape())
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return failure();
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if (!resultShapedType.hasStaticShape())
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return failure();
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// Only support padding with a constant for now, i.e. either:
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// 1. A BBarg from a different block.
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// 2. A value defined outside of the current block.
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Block &block = padOp.getRegion().front();
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auto yieldOp = cast<tensor::YieldOp>(block.getTerminator());
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Value padValue = yieldOp.getValue();
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Operation *definingOp = padValue.getDefiningOp();
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if (definingOp && definingOp->getBlock() == &block)
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return failure();
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if (!definingOp && padValue.cast<BlockArgument>().getOwner() == &block)
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return failure();
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// Create tensor with the padded shape
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Location loc = padOp.getLoc();
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SmallVector<Value> indices(resultShapedType.getRank(),
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rewriter.create<arith::ConstantIndexOp>(loc, 0));
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Value emptyTensor = rewriter.create<tensor::EmptyOp>(
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loc, resultShapedType.getShape(), resultShapedType.getElementType());
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// Initialize tensor with the pad value
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Value tmpTensor = rewriter
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.create<linalg::FillOp>(loc, ValueRange{padValue},
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ValueRange{emptyTensor})
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.result();
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// Copy original contents into new tensor
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// Uses linalg.generic, but could be done with tensor.insert_slice
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SmallVector<AffineExpr, 4> outputExprs;
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for (unsigned i = 0; i < resultShapedType.getRank(); ++i) {
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outputExprs.push_back(getAffineDimExpr(i, rewriter.getContext()) +
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padOp.getStaticLow()[i]);
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}
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SmallVector<AffineMap, 2> transferMaps = {
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rewriter.getMultiDimIdentityMap(inputShapedType.getRank()),
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AffineMap::get(resultShapedType.getRank(),
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/*symbolCount=*/0, outputExprs, rewriter.getContext())};
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rewriter.replaceOpWithNewOp<linalg::GenericOp>(
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padOp, resultShapedType, padOp.getSource(), tmpTensor, transferMaps,
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getNParallelLoopsAttrs(resultShapedType.getRank()),
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[&](OpBuilder &nestedBuilder, Location nestedLoc, ValueRange args) {
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nestedBuilder.create<linalg::YieldOp>(nestedLoc, args[0]);
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});
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return success();
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}
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/// Filling `dest` using FillOp constant padding value if possible.
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/// Otherwise, generate a tensor::GenerateOp.
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Value GeneralizePadOpPattern::createFillOrGenerateOp(
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PatternRewriter &rewriter, tensor::PadOp padOp, Value dest,
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const SmallVector<Value> &dynSizes) const {
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auto padValue = padOp.getConstantPaddingValue();
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if (padValue)
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return rewriter.create<FillOp>(padOp.getLoc(), padValue, dest).result();
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// Fill could not be optimized: Lower to tensor::GenerateOp with region.
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auto generateOp = rewriter.create<tensor::GenerateOp>(
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padOp.getLoc(), padOp.getResultType(), dynSizes);
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// Copy region to new op.
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BlockAndValueMapping bvm;
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padOp.getRegion().cloneInto(&generateOp.getRegion(), bvm);
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return generateOp;
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}
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LogicalResult
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GeneralizePadOpPattern::matchAndRewrite(tensor::PadOp padOp,
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PatternRewriter &rewriter) const {
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// Given an OpFoldResult, return an index-typed value.
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auto getIdxValue = [&](OpFoldResult ofr) {
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if (auto val = ofr.dyn_cast<Value>())
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return val;
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return rewriter
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.create<arith::ConstantIndexOp>(
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padOp.getLoc(), ofr.get<Attribute>().cast<IntegerAttr>().getInt())
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.getResult();
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};
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auto resultType = padOp.getResultType();
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// Compute size of EmptyOp. Any combination of static/dynamic is supported.
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SmallVector<Value> dynSizes;
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SmallVector<int64_t> staticSizes;
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for (unsigned dim = 0; dim < resultType.getRank(); ++dim) {
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if (resultType.isDynamicDim(dim)) {
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auto srcSize = rewriter.createOrFold<tensor::DimOp>(
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padOp.getLoc(), padOp.getSource(), dim);
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// Add low and high padding value.
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auto plusLow = rewriter.createOrFold<arith::AddIOp>(
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padOp.getLoc(), srcSize, getIdxValue(padOp.getMixedLowPad()[dim]));
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auto plusHigh = rewriter.createOrFold<arith::AddIOp>(
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padOp.getLoc(), plusLow, getIdxValue(padOp.getMixedHighPad()[dim]));
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dynSizes.push_back(plusHigh);
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}
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staticSizes.push_back(resultType.getDimSize(dim));
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}
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// Init tensor and fill it with padding.
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Value emptyTensor = rewriter.create<tensor::EmptyOp>(
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padOp.getLoc(), staticSizes, resultType.getElementType(), dynSizes);
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Value fill = createFillOrGenerateOp(rewriter, padOp, emptyTensor, dynSizes);
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|
|
// Try optimize the copy of source.
|
|
if (optimizeCopyFn && optimizeCopyFn(rewriter, padOp, fill).succeeded())
|
|
return success();
|
|
|
|
// tensor::PadOps cannot be optimized. Generate a InsertSliceOp instead
|
|
// for copying the PadOp source.
|
|
auto sourceType = padOp.getSourceType();
|
|
// Compute size of source of tensor::PadOp.
|
|
SmallVector<OpFoldResult> srcSizes;
|
|
for (unsigned dim = 0; dim < sourceType.getRank(); ++dim) {
|
|
if (sourceType.isDynamicDim(dim)) {
|
|
srcSizes.push_back(rewriter.createOrFold<tensor::DimOp>(
|
|
padOp.getLoc(), padOp.getSource(), dim));
|
|
} else {
|
|
srcSizes.push_back(rewriter.getIndexAttr(sourceType.getDimSize(dim)));
|
|
}
|
|
}
|
|
// Strides of InsertSliceOp are all 1.
|
|
SmallVector<OpFoldResult> strides(sourceType.getRank(),
|
|
rewriter.getIndexAttr(1));
|
|
rewriter.replaceOpWithNewOp<tensor::InsertSliceOp>(
|
|
padOp, padOp.getSource(), fill, padOp.getMixedLowPad(), srcSizes,
|
|
strides);
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult ExtractSliceOfPadTensorSwapPattern::matchAndRewrite(
|
|
tensor::ExtractSliceOp sliceOp, PatternRewriter &rewriter) const {
|
|
if (!sliceOp.hasUnitStride())
|
|
return failure();
|
|
|
|
auto padOp = sliceOp.getSource().getDefiningOp<tensor::PadOp>();
|
|
if (!padOp)
|
|
return failure();
|
|
|
|
bool zeroSliceGuard = true;
|
|
if (controlFn) {
|
|
if (std::optional<bool> control = controlFn(sliceOp))
|
|
zeroSliceGuard = *control;
|
|
else
|
|
return failure();
|
|
}
|
|
|
|
Operation *tiledPadOp =
|
|
tensor::bubbleUpPadSlice(rewriter, padOp, sliceOp.getMixedOffsets(),
|
|
sliceOp.getMixedSizes(), zeroSliceGuard);
|
|
// All shapes are static and the data source is actually used. Rewrite into
|
|
// pad(extract_slice(x)).
|
|
rewriter.replaceOp(sliceOp, tiledPadOp->getResults());
|
|
return success();
|
|
}
|
|
|
|
/// Returns a tensor.pad op if padding value is set. Otherwise, returns the
|
|
/// source directly. The method assumes that the `packOp` has static shapes.
|
|
static Value getPackOpSourceOrPaddedSource(OpBuilder &builder,
|
|
tensor::PackOp packOp) {
|
|
Value input = packOp.getSource();
|
|
if (!packOp.getPaddingValue()) {
|
|
return input;
|
|
}
|
|
|
|
Location loc = packOp.getLoc();
|
|
ShapedType inputType = packOp.getSourceType();
|
|
int64_t inputRank = inputType.getRank();
|
|
assert(llvm::all_of(packOp.getDestType().getShape().take_front(inputRank),
|
|
[](int64_t val) { return val == 1; }));
|
|
|
|
SmallVector<int64_t> paddedShape;
|
|
DenseMap<int64_t, OpFoldResult> tileAndPosMapping =
|
|
packOp.getDimAndTileMapping();
|
|
for (int64_t dim = 0; dim < inputRank; ++dim) {
|
|
int64_t size = inputType.getDimSize(dim);
|
|
if (!tileAndPosMapping.count(dim)) {
|
|
paddedShape.push_back(size);
|
|
continue;
|
|
}
|
|
|
|
// The size is less than or equal to tileSize because outer dims are all 1s.
|
|
std::optional<int64_t> tileSize =
|
|
getConstantIntValue(tileAndPosMapping.lookup(dim));
|
|
assert(tileSize.has_value() && "dynamic inner tile size is not supported");
|
|
paddedShape.push_back(tileSize.value());
|
|
}
|
|
auto resultType =
|
|
RankedTensorType::get(paddedShape, inputType.getElementType());
|
|
return tensor::createPadHighOp(resultType, input, packOp.getPaddingValue(),
|
|
/*nofold=*/false, loc, builder);
|
|
}
|
|
|
|
static SmallVector<int64_t>
|
|
getPackUnpackNormalizedInnerPerm(int rank, ArrayRef<int64_t> innerDimsPos) {
|
|
constexpr int64_t kNonTiledMarker = -1;
|
|
SmallVector<int64_t> vec(rank, kNonTiledMarker);
|
|
for (auto [index, value] : llvm::enumerate(innerDimsPos))
|
|
vec[value] = index;
|
|
SmallVector<int64_t> perm = llvm::to_vector(llvm::make_filter_range(
|
|
vec, [&](int64_t v) { return v != kNonTiledMarker; }));
|
|
return perm;
|
|
}
|
|
|
|
LogicalResult GeneralizeOuterUnitDimsPackOpPattern::matchAndRewrite(
|
|
tensor::PackOp packOp, PatternRewriter &rewriter) const {
|
|
// TODO: support the case that outer dimensions are not all 1s A
|
|
// tensor.expand_shape will be generated in this case.
|
|
int64_t srcRank = packOp.getSourceRank();
|
|
if (llvm::any_of(packOp.getDestType().getShape().take_front(srcRank),
|
|
[](int64_t val) { return val != 1; })) {
|
|
return rewriter.notifyMatchFailure(
|
|
packOp, "require the outer dimension of the result are all 1s");
|
|
}
|
|
|
|
if (llvm::any_of(packOp.getMixedTiles(),
|
|
[](OpFoldResult tile) { return tile.is<Value>(); })) {
|
|
return rewriter.notifyMatchFailure(packOp,
|
|
"require inner tile sizes being static");
|
|
}
|
|
|
|
// 1. Use rank-reduced tensor.extract_slice op to extract the tile.
|
|
Location loc = packOp.getLoc();
|
|
Attribute zeroIdxAttr = rewriter.getIndexAttr(0);
|
|
Attribute oneIdxAttr = rewriter.getIndexAttr(1);
|
|
SmallVector<OpFoldResult> readOffsets(srcRank, zeroIdxAttr);
|
|
SmallVector<OpFoldResult> readStrides(srcRank, oneIdxAttr);
|
|
SmallVector<OpFoldResult> readSizes;
|
|
SmallVector<int64_t> readShape;
|
|
DenseMap<int64_t, OpFoldResult> dimAndTileMapping =
|
|
packOp.getDimAndTileMapping();
|
|
for (auto i : llvm::seq<unsigned>(0, srcRank)) {
|
|
if (!dimAndTileMapping.count(i)) {
|
|
readSizes.push_back(oneIdxAttr);
|
|
continue;
|
|
}
|
|
readSizes.push_back(dimAndTileMapping[i]);
|
|
readShape.push_back(getConstantIntValue(dimAndTileMapping[i])
|
|
.value_or(ShapedType::kDynamic));
|
|
}
|
|
Type elemType = packOp.getSourceType().getElementType();
|
|
auto readType = RankedTensorType::get(readShape, elemType);
|
|
|
|
Value input = getPackOpSourceOrPaddedSource(rewriter, packOp);
|
|
Value tile = rewriter.create<tensor::ExtractSliceOp>(
|
|
loc, readType, input, readOffsets, readSizes, readStrides);
|
|
|
|
// 2. Transpose the tile to match the inner tile order.
|
|
SmallVector<int64_t> perm =
|
|
getPackUnpackNormalizedInnerPerm(srcRank, packOp.getInnerDimsPos());
|
|
SmallVector<int64_t> transpShape = readShape;
|
|
applyPermutationToVector<int64_t>(transpShape, perm);
|
|
|
|
Value empty = rewriter.create<tensor::EmptyOp>(loc, transpShape, elemType);
|
|
auto transposedOp =
|
|
rewriter.create<linalg::TransposeOp>(loc, tile, empty, perm);
|
|
|
|
// 3. Insert the inner tile to the destination.
|
|
int64_t destRank = packOp.getDestRank();
|
|
SmallVector<OpFoldResult> writeStrides(destRank, oneIdxAttr);
|
|
SmallVector<OpFoldResult> writeOffsets(destRank, zeroIdxAttr);
|
|
SmallVector<OpFoldResult> writeSizes(srcRank, oneIdxAttr);
|
|
for (auto size : transpShape)
|
|
writeSizes.push_back(rewriter.getIndexAttr(size));
|
|
|
|
auto insert = rewriter.create<tensor::InsertSliceOp>(
|
|
loc, transposedOp.getResult()[0], packOp.getDest(), writeOffsets,
|
|
writeSizes, writeStrides);
|
|
rewriter.replaceOp(packOp, insert.getResult());
|
|
|
|
return success();
|
|
}
|
|
|
|
LogicalResult GeneralizeOuterUnitDimsUnPackOpPattern::matchAndRewrite(
|
|
tensor::UnPackOp unpackOp, PatternRewriter &rewriter) const {
|
|
int64_t srcRank = unpackOp.getSourceRank();
|
|
int64_t destRank = unpackOp.getDestRank();
|
|
ArrayRef<int64_t> srcShape = unpackOp.getSourceType().getShape();
|
|
if (llvm::any_of(srcShape.take_front(destRank),
|
|
[](int64_t val) { return val != 1; })) {
|
|
return rewriter.notifyMatchFailure(
|
|
unpackOp, "require the outer dimension of the result are all 1s");
|
|
}
|
|
|
|
// 1. Use rank-reduced tensor.extract_slice op to extract the tile.
|
|
Location loc = unpackOp.getLoc();
|
|
Attribute zeroIdxAttr = rewriter.getIndexAttr(0);
|
|
Attribute oneIdxAttr = rewriter.getIndexAttr(1);
|
|
SmallVector<OpFoldResult> readOffsets(srcRank, zeroIdxAttr);
|
|
SmallVector<OpFoldResult> readStrides(srcRank, oneIdxAttr);
|
|
|
|
auto mixedTiles = unpackOp.getMixedTiles();
|
|
SmallVector<OpFoldResult> readSizes(destRank, oneIdxAttr);
|
|
readSizes.append(mixedTiles.begin(), mixedTiles.end());
|
|
|
|
// Explicitly create the type for extract_slice op because the inner tile
|
|
// size could be 1. We want to represent the whole inner tile in this case.
|
|
ArrayRef<int64_t> readShape = srcShape.drop_front(destRank);
|
|
Type elemType = unpackOp.getSourceType().getElementType();
|
|
auto readType = RankedTensorType::get(readShape, elemType);
|
|
Value innerTile = rewriter.create<tensor::ExtractSliceOp>(
|
|
loc, readType, unpackOp.getSource(), readOffsets, readSizes, readStrides);
|
|
|
|
// 2. Transpose the tile to match the outer corresponding tile order.
|
|
ArrayRef<int64_t> innerDimsPos = unpackOp.getInnerDimsPos();
|
|
SmallVector<int64_t> perm =
|
|
getPackUnpackNormalizedInnerPerm(srcRank, innerDimsPos);
|
|
SmallVector<int64_t> transpShape(readShape);
|
|
applyPermutationToVector<int64_t>(transpShape, perm);
|
|
|
|
Value empty = rewriter.create<tensor::EmptyOp>(loc, transpShape, elemType);
|
|
auto transposedOp =
|
|
rewriter.create<linalg::TransposeOp>(loc, innerTile, empty, perm);
|
|
|
|
// 3. Handle in-complete tiles if needed. It truncates trailing data from the
|
|
// transposed tile.
|
|
int numLoops = transpShape.size();
|
|
SmallVector<OpFoldResult> tileStrides(numLoops, oneIdxAttr);
|
|
SmallVector<OpFoldResult> tileOffsets(numLoops, zeroIdxAttr);
|
|
SmallVector<OpFoldResult> tileSizes;
|
|
for (int dim : innerDimsPos)
|
|
tileSizes.push_back(getAsOpFoldResult(
|
|
rewriter.createOrFold<tensor::DimOp>(loc, unpackOp.getDest(), dim)));
|
|
|
|
applyPermutationToVector<OpFoldResult>(tileSizes, perm);
|
|
auto partialTile = rewriter.create<tensor::ExtractSliceOp>(
|
|
loc, transposedOp.getResult()[0], tileOffsets, tileSizes, tileStrides);
|
|
|
|
// 4. Insert the result to the destination tensor.
|
|
SmallVector<OpFoldResult> writeSizes;
|
|
SmallVector<OpFoldResult> writeStrides(destRank, oneIdxAttr);
|
|
SmallVector<OpFoldResult> writeOffsets(destRank, zeroIdxAttr);
|
|
DenseMap<int64_t, OpFoldResult> dimAndTileMapping =
|
|
unpackOp.getDimAndTileMapping();
|
|
for (int i = 0, idx = 0; i < destRank; ++i) {
|
|
if (dimAndTileMapping.count(i))
|
|
writeSizes.push_back(tileSizes[idx++]);
|
|
else
|
|
writeSizes.push_back(oneIdxAttr);
|
|
}
|
|
auto insert = rewriter.create<tensor::InsertSliceOp>(
|
|
loc, partialTile, unpackOp.getDest(), writeOffsets, writeSizes,
|
|
writeStrides);
|
|
rewriter.replaceOp(unpackOp, insert.getResult());
|
|
|
|
return success();
|
|
}
|
|
|
|
// The following are patterns for downscaling convolution ops with size-1
|
|
// window dimensions.
|
|
//
|
|
// Note that we'd eventually want to write such transformations in a generic
|
|
// way, e.g., converting to linalg.generic, removing the size-1 dimensions,
|
|
// and then turning back to named ops. But for now it's fine to have a few
|
|
// patterns matching special ops to get started.
|
|
|
|
template <typename Conv2DOp, typename Conv1DOp>
|
|
FailureOr<Conv1DOp> DownscaleSizeOneWindowed2DConvolution<Conv2DOp, Conv1DOp>::
|
|
returningMatchAndRewrite(Conv2DOp convOp, PatternRewriter &rewriter) const {
|
|
if (convOp.hasBufferSemantics())
|
|
return failure(); // To be implemented.
|
|
|
|
Value input = convOp.getInputs().front();
|
|
Value kernel = convOp.getInputs().back();
|
|
Value output = convOp.getOutputs().front();
|
|
|
|
auto inputType = input.getType().dyn_cast<RankedTensorType>();
|
|
auto kernelType = kernel.getType().dyn_cast<RankedTensorType>();
|
|
auto outputType = output.getType().dyn_cast<RankedTensorType>();
|
|
|
|
auto kernelShape = kernelType.getShape();
|
|
auto outputShape = outputType.getShape();
|
|
|
|
// Get domain indices based on conv2D layout.
|
|
auto [khIndex, kwIndex, ohIndex, owIndex] =
|
|
TypeSwitch<Operation *, std::tuple<int64_t, int64_t, int64_t,
|
|
int64_t>>(convOp)
|
|
.Case([&](linalg::Conv2DNhwcHwcfOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::Conv2DNchwFchwOp op) {
|
|
return std::make_tuple(2, 3, 2, 3);
|
|
})
|
|
.Case([&](linalg::PoolingNhwcSumOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::PoolingNchwSumOp op) {
|
|
return std::make_tuple(0, 1, 2, 3);
|
|
})
|
|
.Case([&](linalg::PoolingNhwcMaxOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::PoolingNhwcMaxUnsignedOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::PoolingNhwcMinOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::PoolingNhwcMinUnsignedOp op) {
|
|
return std::make_tuple(0, 1, 1, 2);
|
|
})
|
|
.Case([&](linalg::PoolingNchwMaxOp op) {
|
|
return std::make_tuple(0, 1, 2, 3);
|
|
})
|
|
.Default([&](Operation *op) {
|
|
llvm_unreachable("unexpected conv2d/pool2d operation.");
|
|
return std::make_tuple(0, 0, 0, 0);
|
|
});
|
|
|
|
// Only handle the case where at least one of the window dimensions is
|
|
// of size 1. Other cases can rely on tiling to reduce to such cases.
|
|
int64_t khSize = kernelShape[khIndex], kwSize = kernelShape[kwIndex];
|
|
int64_t ohSize = outputShape[ohIndex], owSize = outputShape[owIndex];
|
|
bool removeH = (khSize == 1 && ohSize == 1);
|
|
bool removeW = (kwSize == 1 && owSize == 1);
|
|
if (!removeH && !removeW)
|
|
return failure();
|
|
|
|
// Get new shapes and types for all operands by removing the size-1
|
|
// dimension.
|
|
using RTTBuilder = RankedTensorType::Builder;
|
|
RankedTensorType newInputType =
|
|
RTTBuilder(inputType).dropDim((removeH ? ohIndex : owIndex));
|
|
RankedTensorType newKernelType =
|
|
RTTBuilder(kernelType).dropDim((removeH ? khIndex : kwIndex));
|
|
RankedTensorType newOutputType =
|
|
RTTBuilder(outputType).dropDim((removeH ? ohIndex : owIndex));
|
|
|
|
// Rank-reduce operands.
|
|
Location loc = convOp.getLoc();
|
|
Value newInput = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, input, newInputType);
|
|
Value newKernel = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, kernel, newKernelType);
|
|
Value newOutput = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, output, newOutputType);
|
|
|
|
// Rank-reduce strides and dilations too.
|
|
// TODO: dropDim 1-liner helper.
|
|
auto strides =
|
|
llvm::to_vector<4>(convOp.getStrides().template getValues<int64_t>());
|
|
strides.erase(strides.begin() + (removeH ? 0 : 1));
|
|
auto stridesAttr = rewriter.getI64VectorAttr(strides);
|
|
|
|
auto dilations =
|
|
llvm::to_vector<4>(convOp.getDilations().template getValues<int64_t>());
|
|
dilations.erase(dilations.begin() + (removeH ? 0 : 1));
|
|
auto dilationsAttr = rewriter.getI64VectorAttr(dilations);
|
|
|
|
auto conv1DOp = rewriter.create<Conv1DOp>(
|
|
loc, newOutputType, ValueRange{newInput, newKernel},
|
|
ValueRange{newOutput}, stridesAttr, dilationsAttr);
|
|
|
|
// Insert back.
|
|
Value inserted = tensor::createCanonicalRankReducingInsertSliceOp(
|
|
rewriter, loc, conv1DOp.getResult(0), output);
|
|
rewriter.replaceOp(convOp, inserted);
|
|
|
|
return conv1DOp;
|
|
}
|
|
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<Conv2DNhwcHwcfOp,
|
|
Conv1DNwcWcfOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<Conv2DNchwFchwOp,
|
|
Conv1DNcwFcwOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<PoolingNhwcSumOp,
|
|
PoolingNwcSumOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<PoolingNchwSumOp,
|
|
PoolingNcwSumOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMaxOp,
|
|
PoolingNwcMaxOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<
|
|
PoolingNhwcMaxUnsignedOp, PoolingNwcMaxUnsignedOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMinOp,
|
|
PoolingNwcMinOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<
|
|
PoolingNhwcMinUnsignedOp, PoolingNwcMinUnsignedOp>;
|
|
template struct linalg::DownscaleSizeOneWindowed2DConvolution<PoolingNchwMaxOp,
|
|
PoolingNcwMaxOp>;
|
|
|
|
FailureOr<DepthwiseConv1DNwcWcOp>
|
|
DownscaleDepthwiseConv2DNhwcHwcOp::returningMatchAndRewrite(
|
|
DepthwiseConv2DNhwcHwcOp convOp, PatternRewriter &rewriter) const {
|
|
if (convOp.hasBufferSemantics())
|
|
return failure(); // To be implemented.
|
|
|
|
Value input = convOp.getInputs().front();
|
|
Value kernel = convOp.getInputs().back();
|
|
Value output = convOp.getOutputs().front();
|
|
|
|
auto inputType = input.getType().dyn_cast<RankedTensorType>();
|
|
auto kernelType = kernel.getType().dyn_cast<RankedTensorType>();
|
|
auto outputType = output.getType().dyn_cast<RankedTensorType>();
|
|
|
|
auto kernelShape = kernelType.getShape();
|
|
auto outputShape = outputType.getShape();
|
|
|
|
// Only handle the case where at least one of the window dimensions is
|
|
// of size 1. Other cases can rely on tiling to reduce to such cases.
|
|
int64_t khSize = kernelShape[0], kwSize = kernelShape[1];
|
|
int64_t ohSize = outputShape[1], owSize = outputShape[2];
|
|
bool removeH = (khSize == 1 && ohSize == 1);
|
|
bool removeW = (kwSize == 1 && owSize == 1);
|
|
if (!removeH && !removeW)
|
|
return failure();
|
|
|
|
// Get new shapes and types for all operands by removing the size-1
|
|
// dimension.
|
|
using RTTBuilder = RankedTensorType::Builder;
|
|
RankedTensorType newInputType =
|
|
RTTBuilder(inputType).dropDim((removeH ? 1 : 2));
|
|
RankedTensorType newKernelType =
|
|
RTTBuilder(kernelType).dropDim((removeH ? 0 : 1));
|
|
RankedTensorType newOutputType =
|
|
RTTBuilder(outputType).dropDim(removeH ? 1 : 2);
|
|
|
|
// Rank-reduce operands.
|
|
Location loc = convOp.getLoc();
|
|
Value newInput = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, input, newInputType);
|
|
Value newKernel = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, kernel, newKernelType);
|
|
Value newOutput = tensor::createCanonicalRankReducingExtractSliceOp(
|
|
rewriter, loc, output, newOutputType);
|
|
|
|
// Rank-reduce strides and dilations too.
|
|
// TODO: dropDim 1-liner helper.
|
|
auto strides = llvm::to_vector<4>(convOp.getStrides().getValues<int64_t>());
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strides.erase(strides.begin() + (removeH ? 0 : 1));
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|
auto stridesAttr = rewriter.getI64VectorAttr(strides);
|
|
|
|
auto dilations =
|
|
llvm::to_vector<4>(convOp.getDilations().getValues<int64_t>());
|
|
dilations.erase(dilations.begin() + (removeH ? 0 : 1));
|
|
auto dilationsAttr = rewriter.getI64VectorAttr(dilations);
|
|
|
|
auto conv1DOp = rewriter.create<DepthwiseConv1DNwcWcOp>(
|
|
loc, newOutputType, ValueRange{newInput, newKernel},
|
|
ValueRange{newOutput}, stridesAttr, dilationsAttr);
|
|
|
|
// Insert back.
|
|
Value inserted = tensor::createCanonicalRankReducingInsertSliceOp(
|
|
rewriter, loc, conv1DOp.getResult(0), output);
|
|
rewriter.replaceOp(convOp, inserted);
|
|
|
|
return conv1DOp;
|
|
}
|
|
|
|
void linalg::populateDecomposeConvolutionPatterns(RewritePatternSet &patterns,
|
|
PatternBenefit benefit) {
|
|
patterns.add<DownscaleSizeOneWindowed2DConvolution<linalg::Conv2DNhwcHwcfOp,
|
|
Conv1DNwcWcfOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<linalg::Conv2DNchwFchwOp,
|
|
Conv1DNcwFcwOp>,
|
|
DownscaleDepthwiseConv2DNhwcHwcOp>(patterns.getContext(),
|
|
benefit);
|
|
patterns.add<
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNhwcSumOp, PoolingNwcSumOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNchwSumOp, PoolingNcwSumOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMaxOp, PoolingNwcMaxOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMaxUnsignedOp,
|
|
PoolingNwcMaxUnsignedOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMinOp, PoolingNwcMinOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNhwcMinUnsignedOp,
|
|
PoolingNwcMinUnsignedOp>,
|
|
DownscaleSizeOneWindowed2DConvolution<PoolingNchwMaxOp, PoolingNcwMaxOp>>(
|
|
patterns.getContext(), benefit);
|
|
}
|