bd7eff1f2a
This is the follow up on https://reviews.llvm.org/D130730 which goes through upstream code and removes creating constant values in favour of using the constant indices in GEP directly. This leads to less and more readable code and more compact IR as well. Differential Revision: https://reviews.llvm.org/D130731
228 lines
10 KiB
MLIR
228 lines
10 KiB
MLIR
// RUN: mlir-opt -allow-unregistered-dialect --convert-gpu-to-nvvm --split-input-file %s | FileCheck --check-prefix=NVVM %s
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// RUN: mlir-opt -allow-unregistered-dialect --convert-gpu-to-rocdl --split-input-file %s | FileCheck --check-prefix=ROCDL %s
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gpu.module @kernel {
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// NVVM-LABEL: llvm.func @private
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gpu.func @private(%arg0: f32) private(%arg1: memref<4xf32, 5>) {
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// Allocate private memory inside the function.
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// NVVM: %[[size:.*]] = llvm.mlir.constant(4 : i64) : i64
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// NVVM: %[[raw:.*]] = llvm.alloca %[[size]] x f32 : (i64) -> !llvm.ptr<f32>
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// ROCDL: %[[size:.*]] = llvm.mlir.constant(4 : i64) : i64
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// ROCDL: %[[raw:.*]] = llvm.alloca %[[size]] x f32 : (i64) -> !llvm.ptr<f32, 5>
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// Populate the memref descriptor.
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// NVVM: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<1 x i64>)>
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// NVVM: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// NVVM: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// NVVM: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// NVVM: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// NVVM: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// NVVM: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// NVVM: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// NVVM: %[[descr6:.*]] = llvm.insertvalue %[[c1]], %[[descr5]][4, 0]
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// ROCDL: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32, 5>, ptr<f32, 5>, i64, array<1 x i64>, array<1 x i64>)>
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// ROCDL: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// ROCDL: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// ROCDL: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// ROCDL: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// ROCDL: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// ROCDL: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// ROCDL: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// ROCDL: %[[descr6:.*]] = llvm.insertvalue %[[c1]], %[[descr5]][4, 0]
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// "Store" lowering should work just as any other memref, only check that
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// we emit some core instructions.
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// NVVM: llvm.extractvalue %[[descr6:.*]]
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// NVVM: llvm.getelementptr
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// NVVM: llvm.store
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// ROCDL: llvm.extractvalue %[[descr6:.*]]
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// ROCDL: llvm.getelementptr
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// ROCDL: llvm.store
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0] : memref<4xf32, 5>
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"terminator"() : () -> ()
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}
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}
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// -----
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gpu.module @kernel {
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// Workgroup buffers are allocated as globals.
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// NVVM: llvm.mlir.global internal @[[$buffer:.*]]()
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// NVVM-SAME: addr_space = 3
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// NVVM-SAME: !llvm.array<4 x f32>
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// ROCDL: llvm.mlir.global internal @[[$buffer:.*]]()
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// ROCDL-SAME: addr_space = 3
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// ROCDL-SAME: !llvm.array<4 x f32>
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// NVVM-LABEL: llvm.func @workgroup
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// NVVM-SAME: {
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// ROCDL-LABEL: llvm.func @workgroup
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// ROCDL-SAME: {
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gpu.func @workgroup(%arg0: f32) workgroup(%arg1: memref<4xf32, 3>) {
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// Get the address of the first element in the global array.
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// NVVM: %[[addr:.*]] = llvm.mlir.addressof @[[$buffer]] : !llvm.ptr<array<4 x f32>, 3>
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// NVVM: %[[raw:.*]] = llvm.getelementptr %[[addr]][0, 0]
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// NVVM-SAME: !llvm.ptr<f32, 3>
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// ROCDL: %[[addr:.*]] = llvm.mlir.addressof @[[$buffer]] : !llvm.ptr<array<4 x f32>, 3>
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// ROCDL: %[[raw:.*]] = llvm.getelementptr %[[addr]][0, 0]
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// ROCDL-SAME: !llvm.ptr<f32, 3>
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// Populate the memref descriptor.
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// NVVM: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32, 3>, ptr<f32, 3>, i64, array<1 x i64>, array<1 x i64>)>
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// NVVM: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// NVVM: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// NVVM: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// NVVM: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// NVVM: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// NVVM: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// NVVM: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// NVVM: %[[descr6:.*]] = llvm.insertvalue %[[c1]], %[[descr5]][4, 0]
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// ROCDL: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32, 3>, ptr<f32, 3>, i64, array<1 x i64>, array<1 x i64>)>
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// ROCDL: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// ROCDL: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// ROCDL: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// ROCDL: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// ROCDL: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// ROCDL: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// ROCDL: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// ROCDL: %[[descr6:.*]] = llvm.insertvalue %[[c1]], %[[descr5]][4, 0]
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// "Store" lowering should work just as any other memref, only check that
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// we emit some core instructions.
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// NVVM: llvm.extractvalue %[[descr6:.*]]
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// NVVM: llvm.getelementptr
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// NVVM: llvm.store
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// ROCDL: llvm.extractvalue %[[descr6:.*]]
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// ROCDL: llvm.getelementptr
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// ROCDL: llvm.store
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0] : memref<4xf32, 3>
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"terminator"() : () -> ()
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}
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}
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// -----
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gpu.module @kernel {
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// Check that the total size was computed correctly.
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// NVVM: llvm.mlir.global internal @[[$buffer:.*]]()
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// NVVM-SAME: addr_space = 3
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// NVVM-SAME: !llvm.array<48 x f32>
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// ROCDL: llvm.mlir.global internal @[[$buffer:.*]]()
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// ROCDL-SAME: addr_space = 3
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// ROCDL-SAME: !llvm.array<48 x f32>
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// NVVM-LABEL: llvm.func @workgroup3d
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// ROCDL-LABEL: llvm.func @workgroup3d
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gpu.func @workgroup3d(%arg0: f32) workgroup(%arg1: memref<4x2x6xf32, 3>) {
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// Get the address of the first element in the global array.
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// NVVM: %[[addr:.*]] = llvm.mlir.addressof @[[$buffer]] : !llvm.ptr<array<48 x f32>, 3>
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// NVVM: %[[raw:.*]] = llvm.getelementptr %[[addr]][0, 0]
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// NVVM-SAME: !llvm.ptr<f32, 3>
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// ROCDL: %[[addr:.*]] = llvm.mlir.addressof @[[$buffer]] : !llvm.ptr<array<48 x f32>, 3>
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// ROCDL: %[[raw:.*]] = llvm.getelementptr %[[addr]][0, 0]
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// ROCDL-SAME: !llvm.ptr<f32, 3>
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// Populate the memref descriptor.
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// NVVM: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32, 3>, ptr<f32, 3>, i64, array<3 x i64>, array<3 x i64>)>
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// NVVM: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// NVVM: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// NVVM: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// NVVM: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// NVVM: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// NVVM: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// NVVM: %[[c12:.*]] = llvm.mlir.constant(12 : index) : i64
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// NVVM: %[[descr6:.*]] = llvm.insertvalue %[[c12]], %[[descr5]][4, 0]
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// NVVM: %[[c2:.*]] = llvm.mlir.constant(2 : index) : i64
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// NVVM: %[[descr7:.*]] = llvm.insertvalue %[[c2]], %[[descr6]][3, 1]
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// NVVM: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
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// NVVM: %[[descr8:.*]] = llvm.insertvalue %[[c6]], %[[descr7]][4, 1]
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// NVVM: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
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// NVVM: %[[descr9:.*]] = llvm.insertvalue %[[c6]], %[[descr8]][3, 2]
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// NVVM: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// NVVM: %[[descr10:.*]] = llvm.insertvalue %[[c1]], %[[descr9]][4, 2]
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// ROCDL: %[[descr1:.*]] = llvm.mlir.undef : !llvm.struct<(ptr<f32, 3>, ptr<f32, 3>, i64, array<3 x i64>, array<3 x i64>)>
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// ROCDL: %[[descr2:.*]] = llvm.insertvalue %[[raw]], %[[descr1]][0]
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// ROCDL: %[[descr3:.*]] = llvm.insertvalue %[[raw]], %[[descr2]][1]
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// ROCDL: %[[c0:.*]] = llvm.mlir.constant(0 : index) : i64
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// ROCDL: %[[descr4:.*]] = llvm.insertvalue %[[c0]], %[[descr3]][2]
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// ROCDL: %[[c4:.*]] = llvm.mlir.constant(4 : index) : i64
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// ROCDL: %[[descr5:.*]] = llvm.insertvalue %[[c4]], %[[descr4]][3, 0]
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// ROCDL: %[[c12:.*]] = llvm.mlir.constant(12 : index) : i64
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// ROCDL: %[[descr6:.*]] = llvm.insertvalue %[[c12]], %[[descr5]][4, 0]
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// ROCDL: %[[c2:.*]] = llvm.mlir.constant(2 : index) : i64
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// ROCDL: %[[descr7:.*]] = llvm.insertvalue %[[c2]], %[[descr6]][3, 1]
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// ROCDL: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
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// ROCDL: %[[descr8:.*]] = llvm.insertvalue %[[c6]], %[[descr7]][4, 1]
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// ROCDL: %[[c6:.*]] = llvm.mlir.constant(6 : index) : i64
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// ROCDL: %[[descr9:.*]] = llvm.insertvalue %[[c6]], %[[descr8]][3, 2]
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// ROCDL: %[[c1:.*]] = llvm.mlir.constant(1 : index) : i64
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// ROCDL: %[[descr10:.*]] = llvm.insertvalue %[[c1]], %[[descr9]][4, 2]
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0,%c0,%c0] : memref<4x2x6xf32, 3>
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"terminator"() : () -> ()
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}
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}
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// -----
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gpu.module @kernel {
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// Check that several buffers are defined.
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// NVVM: llvm.mlir.global internal @[[$buffer1:.*]]()
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// NVVM-SAME: !llvm.array<1 x f32>
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// NVVM: llvm.mlir.global internal @[[$buffer2:.*]]()
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// NVVM-SAME: !llvm.array<2 x f32>
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// ROCDL: llvm.mlir.global internal @[[$buffer1:.*]]()
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// ROCDL-SAME: !llvm.array<1 x f32>
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// ROCDL: llvm.mlir.global internal @[[$buffer2:.*]]()
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// ROCDL-SAME: !llvm.array<2 x f32>
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// NVVM-LABEL: llvm.func @multiple
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// ROCDL-LABEL: llvm.func @multiple
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gpu.func @multiple(%arg0: f32)
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workgroup(%arg1: memref<1xf32, 3>, %arg2: memref<2xf32, 3>)
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private(%arg3: memref<3xf32, 5>, %arg4: memref<4xf32, 5>) {
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// Workgroup buffers.
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// NVVM: llvm.mlir.addressof @[[$buffer1]]
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// NVVM: llvm.mlir.addressof @[[$buffer2]]
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// ROCDL: llvm.mlir.addressof @[[$buffer1]]
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// ROCDL: llvm.mlir.addressof @[[$buffer2]]
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// Private buffers.
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// NVVM: %[[c3:.*]] = llvm.mlir.constant(3 : i64)
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// NVVM: llvm.alloca %[[c3]] x f32 : (i64) -> !llvm.ptr<f32>
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// NVVM: %[[c4:.*]] = llvm.mlir.constant(4 : i64)
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// NVVM: llvm.alloca %[[c4]] x f32 : (i64) -> !llvm.ptr<f32>
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// ROCDL: %[[c3:.*]] = llvm.mlir.constant(3 : i64)
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// ROCDL: llvm.alloca %[[c3]] x f32 : (i64) -> !llvm.ptr<f32, 5>
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// ROCDL: %[[c4:.*]] = llvm.mlir.constant(4 : i64)
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// ROCDL: llvm.alloca %[[c4]] x f32 : (i64) -> !llvm.ptr<f32, 5>
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0] : memref<1xf32, 3>
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memref.store %arg0, %arg2[%c0] : memref<2xf32, 3>
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memref.store %arg0, %arg3[%c0] : memref<3xf32, 5>
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memref.store %arg0, %arg4[%c0] : memref<4xf32, 5>
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"terminator"() : () -> ()
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}
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}
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