cdda3daa7f
Support for CUDA printf is exploited to support printf for an NVPTX OpenMP device. To reflect the support of both programming models, the file CGCUDABuiltin.cpp has been renamed to CGGPUBuiltin.cpp, and the call EmitCUDADevicePrintfCallExpr has been renamed to EmitGPUDevicePrintfCallExpr. Reviewers: jlebar Differential Revision: https://reviews.llvm.org/D17890 llvm-svn: 293444
117 lines
5.2 KiB
C
117 lines
5.2 KiB
C
// Test target codegen - host bc file has to be created first.
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// RUN: %clang_cc1 -verify -fopenmp -x c -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -x c -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
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// RUN: %clang_cc1 -verify -fopenmp -x c -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
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// RUN: %clang_cc1 -verify -fopenmp -x c -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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#include <stdarg.h>
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// expected-no-diagnostics
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extern int printf(const char *, ...);
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extern int vprintf(const char *, va_list);
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// Check a simple call to printf end-to-end.
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// CHECK: [[SIMPLE_PRINTF_TY:%[a-zA-Z0-9_]+]] = type { i32, i64, double }
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int CheckSimple() {
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// CHECK: define {{.*}}void [[T1:@__omp_offloading_.+CheckSimple.+]]_worker()
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#pragma omp target
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{
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// Entry point.
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// CHECK: define {{.*}}void [[T1]]()
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// Alloca in entry block.
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// CHECK: [[BUF:%[a-zA-Z0-9_]+]] = alloca [[SIMPLE_PRINTF_TY]]
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// CHECK: {{call|invoke}} void [[T1]]_worker()
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// CHECK: br label {{%?}}[[EXIT:.+]]
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//
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// CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
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// CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
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//
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// CHECK: [[MASTER]]
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// CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[MTMP1:%.+]] = sub i32 [[MNTH]], [[MWS]]
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// CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
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// printf in master-only basic block.
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// CHECK: [[FMT:%[0-9]+]] = load{{.*}}%fmt
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const char* fmt = "%d %lld %f";
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// CHECK: [[PTR0:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 0
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// CHECK: store i32 1, i32* [[PTR0]], align 4
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// CHECK: [[PTR1:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 1
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// CHECK: store i64 2, i64* [[PTR1]], align 8
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// CHECK: [[PTR2:%[0-9]+]] = getelementptr inbounds [[SIMPLE_PRINTF_TY]], [[SIMPLE_PRINTF_TY]]* [[BUF]], i32 0, i32 2
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// CHECK: store double 3.0{{[^,]*}}, double* [[PTR2]], align 8
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// CHECK: [[BUF_CAST:%[0-9]+]] = bitcast [[SIMPLE_PRINTF_TY]]* [[BUF]] to i8*
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// CHECK: [[RET:%[0-9]+]] = call i32 @vprintf(i8* [[FMT]], i8* [[BUF_CAST]])
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printf(fmt, 1, 2ll, 3.0);
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}
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return 0;
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}
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void CheckNoArgs() {
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// CHECK: define {{.*}}void [[T2:@__omp_offloading_.+CheckNoArgs.+]]_worker()
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#pragma omp target
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{
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// Entry point.
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// CHECK: define {{.*}}void [[T2]]()
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// CHECK: {{call|invoke}} void [[T2]]_worker()
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// CHECK: br label {{%?}}[[EXIT:.+]]
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//
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// CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
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// CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
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//
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// CHECK: [[MASTER]]
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// CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[MTMP1:%.+]] = sub i32 [[MNTH]], [[MWS]]
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// CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
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// printf in master-only basic block.
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// CHECK: call i32 @vprintf({{.*}}, i8* null){{$}}
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printf("hello, world!");
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}
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}
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// Check that printf's alloca happens in the entry block, not inside the if
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// statement.
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int foo;
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void CheckAllocaIsInEntryBlock() {
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// CHECK: define {{.*}}void [[T3:@__omp_offloading_.+CheckAllocaIsInEntryBlock.+]]_worker()
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#pragma omp target
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{
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// Entry point.
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// CHECK: define {{.*}}void [[T3]](
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// Alloca in entry block.
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// CHECK: alloca %printf_args
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// CHECK: {{call|invoke}} void [[T3]]_worker()
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// CHECK: br label {{%?}}[[EXIT:.+]]
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//
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// CHECK-DAG: [[CMTID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[CMNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[CMWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[IS_MASTER:%.+]] = icmp eq i32 [[CMTID]],
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// CHECK: br i1 [[IS_MASTER]], label {{%?}}[[MASTER:.+]], label {{%?}}[[EXIT]]
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//
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// CHECK: [[MASTER]]
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// CHECK-DAG: [[MNTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[MWS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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// CHECK: [[MTMP1:%.+]] = sub i32 [[MNTH]], [[MWS]]
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// CHECK: call void @__kmpc_kernel_init(i32 [[MTMP1]]
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if (foo) {
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printf("%d", 42);
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}
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}
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}
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