ShadowCallStack implementation uses s2 register on RISC-V, but that choice is problematic for reasons described in: https://lists.riscv.org/g/sig-toolchains/message/544, https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/370, and https://github.com/google/android-riscv64/issues/72 The concern over the register choice was also brought up in https://reviews.llvm.org/D84414. https://reviews.llvm.org/D84414#2228666 said: ``` "If the register choice is the only concern about this work, then I think we can probably land it as-is and fixup the register choice if we see major drawbacks later. Yes, it's an ABI issue, but on the other hand the shadow call stack is not a standard ABI anyway."" ``` Since we have now found a sufficient reason to fixup the register choice, we should go ahead and update the implementation. We propose using x3(gp) which is now the platform register in the RISC-V ABI. Reviewed By: asb, hiraditya, mcgrathr, craig.topper Differential Revision: https://reviews.llvm.org/D146463
24 lines
752 B
Python
24 lines
752 B
Python
# -*- Python -*-
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import os
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# Setup config name.
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config.name = 'ShadowCallStack'
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# Setup source root.
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config.test_source_root = os.path.dirname(__file__)
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# Test suffixes.
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config.suffixes = ['.c', '.cpp', '.m', '.mm', '.ll', '.test']
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# Add clang substitutions.
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config.substitutions.append( ("%clang_noscs ", config.clang + ' -O0 -fno-sanitize=shadow-call-stack ' + config.target_cflags + ' ') )
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scs_arch_cflags = config.target_cflags
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if config.target_arch == 'aarch64':
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scs_arch_cflags += ' -ffixed-x18 '
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config.substitutions.append( ("%clang_scs ", config.clang + ' -O0 -fsanitize=shadow-call-stack ' + scs_arch_cflags + ' ') )
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if config.host_os not in ['Linux'] or config.target_arch not in ['aarch64','riscv64']:
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config.unsupported = True
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