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Simon Pilgrim eb7a553db8 [X86] XFormVExtractWithShuffleIntoLoad - handle shuffle mask scaling 
If the target shuffle mask is from a wider type, attempt to scale the mask so that the extraction can attempt to peek through.

Fixes the regression mentioned in rL368307

llvm-svn: 368308
2019-08-08 16:05:23 +00:00
..
avx512-shuffles
[X86][AVX] Combine vpermi(bitcast(x)) -> bitcast(vpermi(x))
2019-07-03 14:34:16 +00:00
GC
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
GlobalISel
[GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs and legalize later.
2019-07-19 00:24:45 +00:00
3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
4char-promote.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
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Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
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Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
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[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
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Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
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2011-12-8-bitcastintprom.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2011-12-06-AVXVectorExtractCombine.ll
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-08-AVXISelBugs.ll
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2011-12-15-vec_shift.ll
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2011-12-26-extractelement-duplicate-load.ll
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2011-12-28-vselecti8.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2011-20-21-zext-ui2fp.ll
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2012-1-10-buildvector.ll
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2012-01-10-UndefExceptionEdge.ll
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2012-01-11-split-cv.ll
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2012-01-12-extract-sv.ll
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2012-01-16-mfence-nosse-flags.ll
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2012-01-18-vbitcast.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-02-12-dagco.ll
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2012-02-14-scalar.ll
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
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2012-03-15-build_vector_wl.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-03-20-LargeConstantExpr.ll
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2012-03-26-PostRALICMBug.ll
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2012-04-09-TwoAddrPassBug.ll
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2012-04-26-sdglue.ll
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2012-05-17-TwoAddressBug.ll
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2012-05-19-CoalescerCrash.ll
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2012-07-10-extload64.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-07-10-shufnorm.ll
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2012-07-15-broadcastfold.ll
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2012-07-15-BuildVectorPromote.ll
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2012-07-15-tconst_shl.ll
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2012-07-15-vshl.ll
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2012-07-16-fp2ui-i1.ll
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2012-07-16-LeaUndef.ll
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2012-07-17-vtrunc.ll
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2012-07-23-select_cc.ll
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2012-08-07-CmpISelBug.ll
[TargetLowering] Add SimplifyMultipleUseDemandedBits
2019-07-23 12:39:08 +00:00
2012-08-16-setcc.ll
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2012-08-17-legalizer-crash.ll
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2012-08-28-UnsafeMathCrash.ll
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2012-09-13-dagco-fneg.ll
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2012-09-28-CGPBug.ll
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2012-10-02-DAGCycle.ll
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2012-10-03-DAGCycle.ll
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2012-10-18-crash-dagco.ll
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2012-11-28-merge-store-alias.ll
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2012-12-1-merge-multiple.ll
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2012-12-12-DAGCombineCrash.ll
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2012-12-14-v8fp80-crash.ll
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2012-12-19-NoImplicitFloat.ll
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2013-01-09-DAGCombineBug.ll
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2013-03-13-VEX-DestReg.ll
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2013-05-06-ConactVectorCrash.ll
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2013-10-14-FastISel-incorrect-vreg.ll
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2014-05-29-factorial.ll
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2014-08-29-CompactUnwind.ll
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9601.ll
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20090313-signext.ll
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abi-isel.ll
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absolute-bit-mask-fastisel.ll
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absolute-bit-mask.ll
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absolute-bt.ll
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absolute-cmp.ll
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absolute-constant.ll
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absolute-rotate.ll
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add32ri8.ll
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add_shl_constant.ll
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add-ext.ll
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add-i64.ll
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add-of-carry.ll
[DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo.
2019-07-04 18:18:46 +00:00
add-sub-nsw-nuw.ll
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add.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
addcarry2.ll
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addcarry.ll
[DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarry b, a, !c) and flip carry.
2019-07-16 15:17:00 +00:00
addr-label-difference.ll
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addr-mode-matcher-2.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
addr-mode-matcher.ll
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addr-of-ret-addr.ll
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address-type-promotion-constantexpr.ll
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addrsig.ll
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addsub-constant-folding.ll
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adx-commute.mir
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adx-intrinsics-upgrade.ll
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adx-intrinsics.ll
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aes_intrinsics.ll
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alias-gep.ll
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alias-static-alloca.ll
[X86] Regenerate alias-static-alloca test checks to make D65354 diff easier
2019-07-31 12:27:47 +00:00
aliases.ll
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aligned-comm.ll
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aligned-variadic.ll
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alignment-2.ll
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alignment.ll
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all-ones-vector.ll
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alldiv-divdi3.ll
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alloca-align-rounding-32.ll
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alloca-align-rounding.ll
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alloca-overaligned.ll
[Tests] Add a test showing how we handle overaligned allocas w/ no-realign-stack
2019-07-18 00:26:03 +00:00
allrem-moddi3.ll
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and-encoding.ll
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and-load-fold.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
and-or-fold.ll
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and-sink.ll
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and-su.ll
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andimm8.ll
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anyext.ll
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anyregcc-crash.ll
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anyregcc.ll
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apm.ll
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AppendingLinkage.ll
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arg_returned_bitcast.ll
[SelectionDAG][FIX] Allow "returned" arguments to be bit-casted
2019-06-04 20:34:43 +00:00
arg-cast.ll
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arg-copy-elide-win64.ll
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arg-copy-elide.ll
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asm-block-labels.ll
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asm-global-imm.ll
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asm-indirect-mem.ll
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asm-invalid-register-class-crasher.ll
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asm-label2.ll
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asm-label.ll
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asm-mismatched-types.ll
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asm-modifier-P.ll
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asm-modifier.ll
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asm-reg-type-mismatch-avx512.ll
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asm-reg-type-mismatch.ll
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asm-reject-reg-type-mismatch.ll
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asm-reject-rex.ll
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asm-reject-vk32-vk64.ll
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asm-reject-xmm16.ll
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atom-call-reg-indirect-foldedreload32.ll
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atom-call-reg-indirect-foldedreload64.ll
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atom-call-reg-indirect.ll
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atom-cmpb.ll
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atom-fixup-lea1.ll
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atom-fixup-lea2.ll
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atom-fixup-lea3.ll
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atom-fixup-lea4.ll
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atom-lea-addw-bug.ll
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atom-lea-sp.ll
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atom-pad-short-functions.ll
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atom-sched.ll
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atom-shuf.ll
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atomic8.ll
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atomic16.ll
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atomic32.ll
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atomic64.ll
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atomic128.ll
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atomic6432.ll
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atomic-add.ll
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atomic-dagsched.ll
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atomic-eflags-reuse.ll
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atomic-flags.ll
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atomic-fp.ll
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atomic-idempotent.ll
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atomic-load-store-wide.ll
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atomic-load-store.ll
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atomic-mi.ll
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atomic-minmax-i6432.ll
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atomic-monotonic.ll
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atomic-non-integer.ll
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atomic-op.ll
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atomic-ops-ancient-64.ll
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atomic-or.ll
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atomic-pointer.ll
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atomic-unordered.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
atomicf128.ll
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Atomics-64.ll
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attribute-sections.ll
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avg-mask.ll
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avg.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avoid_complex_am.ll
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avoid-lea-scale2.ll
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avoid-loop-align-2.ll
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avoid-loop-align.ll
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avoid-sfb-g-no-change2.mir
[X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2)
2019-07-01 18:28:21 +00:00
avoid-sfb-g-no-change3.mir
[X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2)
2019-07-01 18:28:21 +00:00
avoid-sfb-g-no-change.mir
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avoid-sfb-kill-flags.mir
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avoid-sfb-offset.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
avoid-sfb-overlaps.ll
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avoid-sfb.ll
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avx1-logical-load-folding.ll
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avx2-arith.ll
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avx2-cmp.ll
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avx2-conversions.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-fma-fneg-combine.ll
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avx2-gather.ll
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avx2-intrinsics-canonical.ll
[X86] Regenerate tests. NFCI.
2019-07-10 17:22:31 +00:00
avx2-intrinsics-fast-isel.ll
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avx2-intrinsics-x86-upgrade.ll
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avx2-intrinsics-x86.ll
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avx2-logic.ll
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avx2-masked-gather.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-nontemporal.ll
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avx2-phaddsub.ll
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avx2-pmovxrm.ll
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avx2-shift.ll
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avx2-vbroadcast.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-vbroadcasti128.ll
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avx2-vector-shifts.ll
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avx2-vperm.ll
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avx512-adc-sbb.ll
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avx512-any_extend_load.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-arith.ll
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avx512-bugfix-23634.ll
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avx512-bugfix-25270.ll
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avx512-bugfix-26264.ll
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avx512-build-vector.ll
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avx512-calling-conv.ll
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avx512-cmp-kor-sequence.ll
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avx512-cmp.ll
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avx512-cvt.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-cvttp2i.ll
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avx512-ext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-extract-subvector-load-store.ll
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avx512-extract-subvector.ll
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avx512-fma-commute.ll
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avx512-fma-intrinsics-upgrade.ll
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avx512-fma-intrinsics.ll
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avx512-fma.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
avx512-fsel.ll
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avx512-gather-scatter-intrin-deprecated.ll
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avx512-gather-scatter-intrin.ll
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avx512-gfni-intrinsics.ll
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avx512-hadd-hsub.ll
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avx512-i1test.ll
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avx512-inc-dec.ll
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avx512-insert-extract_i1.ll
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avx512-insert-extract.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
avx512-intel-ocl.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
avx512-intrinsics-canonical.ll
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avx512-intrinsics-fast-isel.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask
2019-08-08 15:54:20 +00:00
avx512-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-intrinsics-x86_64.ll
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avx512-intrinsics.ll
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avx512-load-store.ll
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avx512-load-trunc-store-i1.ll
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avx512-logic.ll
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avx512-mask-op.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-mask-spills.ll
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avx512-mask-zext-bugfix.ll
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avx512-masked_memop-16-8.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches.
2019-07-31 22:58:15 +00:00
avx512-masked-memop-64-32.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
avx512-memfold.ll
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avx512-mov.ll
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avx512-nontemporal.ll
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avx512-pmovxrm.ll
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avx512-regcall-Mask.ll
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avx512-regcall-NoMask.ll
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avx512-rndscale.ll
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avx512-rotate.ll
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avx512-scalar_mask.ll
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avx512-scalar.ll
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avx512-scalarIntrinsics.ll
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avx512-select.ll
[x86] remove whitespace; NFC
2019-06-27 20:37:12 +00:00
avx512-shift.ll
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avx512-skx-insert-subvec.ll
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avx512-trunc.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-unsafe-fp-math.ll
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avx512-vbroadcast.ll
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avx512-vbroadcasti128.ll
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avx512-vbroadcasti256.ll
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avx512-vec3-crash.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-vec-cmp.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-vpclmulqdq.ll
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avx512-vpermv3-commute.ll
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avx512-vpternlog-commute.ll
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avx512-vselect-crash.ll
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avx512-vselect.ll
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avx512bf16-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512bf16-vl-intrinsics.ll
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avx512bw-arith.ll
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avx512bw-intrinsics-canonical.ll
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avx512bw-intrinsics-fast-isel.ll
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avx512bw-intrinsics-upgrade.ll
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avx512bw-intrinsics.ll
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avx512bw-mask-op.ll
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avx512bw-mov.ll
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avx512bw-vec-cmp.ll
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avx512bw-vec-test-testn.ll
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avx512bwvl-arith.ll
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avx512bwvl-intrinsics-canonical.ll
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avx512bwvl-intrinsics-fast-isel.ll
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avx512bwvl-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512bwvl-intrinsics.ll
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avx512bwvl-mov.ll
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avx512bwvl-vec-cmp.ll
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avx512bwvl-vec-test-testn.ll
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avx512cd-intrinsics-fast-isel.ll
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avx512cd-intrinsics-upgrade.ll
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avx512cd-intrinsics.ll
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avx512cdvl-intrinsics-upgrade.ll
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avx512cdvl-intrinsics.ll
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avx512dq-intrinsics-fast-isel.ll
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avx512dq-intrinsics-upgrade.ll
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avx512dq-intrinsics.ll
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avx512dq-mask-op.ll
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avx512dqvl-intrinsics-fast-isel.ll
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avx512dqvl-intrinsics-upgrade.ll
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avx512dqvl-intrinsics.ll
[X86] Correct v4f32->v2i64 cvt(t)ps2(u)qq memory isel patterns
2019-07-01 19:01:37 +00:00
avx512er-intrinsics.ll
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avx512f-256-set0.mir
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avx512f-vec-test-testn.ll
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avx512ifma-intrinsics-fast-isel.ll
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avx512ifma-intrinsics-upgrade.ll
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avx512ifma-intrinsics.ll
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avx512ifmavl-intrinsics-fast-isel.ll
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avx512ifmavl-intrinsics-upgrade.ll
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avx512ifmavl-intrinsics.ll
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avx512vbmi2-intrinsics-fast-isel.ll
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avx512vbmi2-intrinsics-upgrade.ll
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avx512vbmi2-intrinsics.ll
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avx512vbmi2vl-intrinsics-fast-isel.ll
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avx512vbmi2vl-intrinsics-upgrade.ll
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avx512vbmi2vl-intrinsics.ll
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avx512vbmi-intrinsics-fast-isel.ll
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avx512vbmi-intrinsics-upgrade.ll
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avx512vbmi-intrinsics.ll
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avx512vbmivl-intrinsics-fast-isel.ll
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avx512vbmivl-intrinsics-upgrade.ll
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avx512vbmivl-intrinsics.ll
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avx512vl_vnni-intrinsics-upgrade.ll
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avx512vl_vnni-intrinsics.ll
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avx512vl-arith.ll
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avx512vl-intrinsics-canonical.ll
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avx512vl-intrinsics-fast-isel.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512vl-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512vl-intrinsics.ll
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avx512vl-logic.ll
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avx512vl-mov.ll
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avx512vl-nontemporal.ll
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avx512vl-vbroadcast.ll
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avx512vl-vec-cmp.ll
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avx512vl-vec-masked-cmp.ll
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avx512vl-vec-test-testn.ll
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avx512vl-vpclmulqdq.ll
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avx512vlcd-intrinsics-fast-isel.ll
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avx512vlvp2intersect-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512vnni-intrinsics-upgrade.ll
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avx512vnni-intrinsics.ll
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avx512vp2intersect-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512vpopcntdq-intrinsics.ll
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avx-arith.ll
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avx-basic.ll
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avx-bitcast.ll
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avx-brcond.ll
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avx-cast.ll
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avx-cmp.ll
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avx-cvt-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx-cvt-3.ll
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avx-cvt.ll
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avx-cvttp2si.ll
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avx-fp2int.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx-gfni-intrinsics.ll
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avx-insertelt.ll
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avx-intel-ocl.ll
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avx-intrinsics-fast-isel.ll
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avx-intrinsics-x86_64.ll
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avx-intrinsics-x86-upgrade.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
avx-intrinsics-x86.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
avx-isa-check.ll
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avx-load-store.ll
[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)
2019-06-21 19:10:21 +00:00
avx-logic.ll
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avx-minmax.ll
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avx-select.ll
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avx-shift.ll
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avx-shuffle-x86_32.ll
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avx-splat.ll
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avx-trunc.ll
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avx-unpack.ll
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avx-varargs-x86_64.ll
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avx-vbroadcast.ll
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avx-vbroadcastf128.ll
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avx-vextractf128.ll
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avx-vinsertf128.ll
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avx-vpclmulqdq.ll
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avx-vperm2x128.ll
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avx-vzeroupper.ll
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avx-win64-args.ll
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avx-win64.ll
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avx.ll
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backpropmask.ll
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bad-tls-fold.mir
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barrier-sse.ll
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barrier.ll
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base-pointer-and-cmpxchg.ll
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basic-promote-integers.ll
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bb_rotate.ll
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bc-extract.ll
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bigstructret2.ll
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bigstructret.ll
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bit-piece-comment.ll
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bit-test-shift.ll
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bitcast2.ll
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bitcast-and-setcc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitcast-and-setcc-256.ll
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bitcast-and-setcc-512.ll
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bitcast-i256.ll
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bitcast-int-to-vector-bool-sext.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector-bool-zext.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector-bool.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector.ll
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bitcast-mmx.ll
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bitcast-setcc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitcast-setcc-256.ll
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bitcast-setcc-512.ll
[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles
2019-06-26 09:50:11 +00:00
bitcast-vector-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitcast.ll
…
bitcnt-false-dep.ll
…
bitreverse.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
block-placement.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
block-placement.mir
…
bmi2-x86_64.ll
…
bmi2.ll
…
bmi-intrinsics-fast-isel-x86_64.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
bmi-intrinsics-fast-isel.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
bmi-x86_64.ll
…
bmi.ll
[X86] Add patterns with and_flag_nocf for BLSI and TBM instructions.
2019-07-10 22:44:32 +00:00
bool-ext-inc.ll
…
bool-math.ll
…
bool-simplify.ll
…
bool-vector.ll
…
bool-zext.ll
…
br-fold.ll
…
branchfolding-catchpads.ll
…
branchfolding-debugloc.ll
…
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcond.ll
…
break-anti-dependencies.ll
…
break-false-dep.ll
…
broadcast-elm-cross-splat-vec.ll
…
broadcastm-lowering.ll
…
bss_pagealigned.ll
…
bswap_tree2.ll
…
bswap_tree.ll
…
bswap-inline-asm.ll
…
bswap-rotate.ll
…
bswap-vector.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
bswap-wide-int.ll
…
bswap.ll
…
bt.ll
…
btc_bts_btr.ll
…
btq.ll
…
bug26810.ll
…
bug37521.ll
…
build-vector-128.ll
…
build-vector-256.ll
…
build-vector-512.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
buildvec-extract.ll
…
buildvec-insertvec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bypass-slow-division-32.ll
…
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
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byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
…
cache-intrinsic.ll
…
call-imm.ll
…
call-push.ll
…
call-site-info-output.ll
[ISEL][X86] Tracking of registers that forward call arguments
2019-06-27 10:51:15 +00:00
callbr-asm-bb-exports.ll
…
callbr-asm-blockplacement.ll
…
callbr-asm-branch-folding.ll
…
callbr-asm-destinations.ll
…
callbr-asm-errors.ll
…
callbr-asm-outputs.ll
…
callbr-asm.ll
Revert "Use the MachineBasicBlock symbol for a callbr target"
2019-07-19 18:18:02 +00:00
cas.ll
…
cast-vsel.ll
[x86] split 256-bit vector selects if operands are vector concats
2019-06-16 14:04:49 +00:00
catch.ll
…
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
…
catchpad-realign-savexmm.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
catchpad-regmask.ll
…
catchpad-reuse.ll
…
catchpad-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
catchret-empty-fallthrough.ll
…
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cfi-inserter-cfg-with-merge.mir
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cfi-inserter-check-order.ll
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cfi-inserter-noreturnblock.mir
…
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
…
cgp-usubo.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
chain_order.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
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change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
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cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
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cleanuppad-large-codemodel.ll
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cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
[X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)
2019-07-22 12:44:10 +00:00
clear-highbits.ll
…
clear-lowbits.ll
…
clflushopt.ll
…
clwb.ll
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clz.ll
…
clzero.ll
…
cmov-double.ll
…
cmov-fp.ll
…
cmov-into-branch.ll
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cmov-promotion.ll
Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
2019-06-26 05:12:53 +00:00
cmov.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
cmovcmov.ll
…
cmp-fast-isel.ll
…
cmp.ll
[X86] When promoting i16 compare with immediate to i32, try to use sign_extend for eq/ne if the input is truncated from a type with enough sign its.
2019-06-10 04:50:12 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
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cmpxchg8b.ll
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cmpxchg16b.ll
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cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
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cmpxchg-i128-i1.ll
…
coal-sections.ll
…
coalesce_commute_movsd.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
coalesce_commute_subreg.ll
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coalesce-dbg-value-subreg-rewrite.mir
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coalesce-dead-lanes.mir
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coalesce-esp.ll
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coalesce-implicitdef.ll
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coalescer-commute1.ll
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coalescer-commute2.ll
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coalescer-commute3.ll
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coalescer-commute4.ll
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coalescer-commute5.ll
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coalescer-cross.ll
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coalescer-dce2.ll
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coalescer-dce.ll
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coalescer-identity.ll
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coalescer-remat.ll
…
coalescer-subreg.ll
…
coalescer-win64.ll
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code_placement_align_all.ll
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code_placement_cold_loop_blocks.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code_placement_eh.ll
…
code_placement_ignore_succ_in_inner_loop.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code_placement_loop_rotation2.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code_placement_loop_rotation3.ll
…
code_placement_loop_rotation.ll
…
code_placement_no_header_change.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code_placement.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code-model-elf-memset.ll
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code-model-elf.ll
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code-model-kernel.ll
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codegen-prepare-addrmode-sext.ll
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codegen-prepare-cast.ll
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codegen-prepare-crash.ll
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codegen-prepare-extload.ll
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codegen-prepare-replacephi.mir
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codegen-prepare-uaddo.ll
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codegen-prepare.ll
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codemodel.ll
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coff-comdat2.ll
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coff-comdat3.ll
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coff-comdat.ll
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coff-feat00.ll
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coff-no-dead-strip.ll
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coff-weak.ll
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coldcc64.ll
…
combine-64bit-vec-binop.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
combine-abs.ll
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combine-adc.ll
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combine-add-ssat.ll
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combine-add-usat.ll
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combine-add.ll
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combine-addo.ll
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combine-adx.ll
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combine-and.ll
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combine-avx2-intrinsics.ll
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combine-avx-intrinsics.ll
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combine-bitreverse.ll
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combine-bitselect.ll
…
combine-bswap.ll
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combine-concatvectors.ll
…
combine-fabs.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll"
2019-06-13 19:24:34 +00:00
combine-fcopysign.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
combine-lds.ll
…
combine-mul.ll
[DAGCombine] visitMUL - allow shift by zero in MulByConstant.
2019-06-24 12:47:17 +00:00
combine-mulo.ll
…
combine-multiplies.ll
…
combine-or.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
combine-pmuldq.ll
[TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG
2019-06-25 12:57:43 +00:00
combine-rotates.ll
…
combine-sbb.ll
[x86] try harder to form LEA from ADD to avoid flag conflicts (PR40483)
2019-07-18 12:48:01 +00:00
combine-sdiv.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
combine-select.ll
…
combine-sext-in-reg.ll
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combine-shl.ll
[DAGCombiner] Support (shl (zext (srl x, C)), C) -> (zext (shl (srl x, C), C)) non-uniform folds.
2019-06-20 14:42:27 +00:00
combine-smax.ll
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combine-smin.ll
…
combine-sra.ll
…
combine-srem.ll
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combine-srl.ll
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combine-sse41-intrinsics.ll
[X86][SSE] Add test cases for PR42825
2019-07-31 14:29:44 +00:00
combine-sub-ssat.ll
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combine-sub-usat.ll
…
combine-sub.ll
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combine-subo.ll
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combine-testm-and.ll
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combine-udiv.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
combine-umax.ll
…
combine-umin.ll
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combine-urem.ll
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commandline-metadata.ll
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commute-3dnow.ll
…
commute-blend-avx2.ll
…
commute-blend-sse41.ll
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commute-clmul.ll
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commute-fcmp.ll
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commute-intrinsic.ll
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commute-two-addr.ll
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commute-vpclmulqdq-avx512.ll
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commute-vpclmulqdq-avx.ll
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commute-xop.ll
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commuted-blend-mask.ll
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compact-unwind.ll
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compare_folding.ll
…
compare-add.ll
…
compare-global.ll
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compare-inf.ll
…
compiler_used.ll
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complex-asm.ll
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complex-fastmath.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
complex-fca.ll
…
computeKnownBits_urem.ll
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condbr_if.ll
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condbr_switch.ll
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conditional-indecrement.ll
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conditional-tailcall-samedest.mir
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conditional-tailcall.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
consecutive-load-shuffle.ll
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const-base-addr.ll
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const-shift-of-constmasked.ll
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constant-combines.ll
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constant-hoisting-and.ll
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constant-hoisting-bfi.ll
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constant-hoisting-cmp.ll
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constant-hoisting-optnone.ll
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constant-hoisting-shift-immediate.ll
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constant-pool-remat-0.ll
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constant-pool-sharing.ll
…
constpool.ll
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constrained-fp80-trunc-ext.ll
[FPEnv] Lower STRICT_FP_EXTEND and STRICT_FP_ROUND nodes in preprocess phase of ISelLowering to mirror non-strict nodes on x86.
2019-06-14 16:28:55 +00:00
constructor.ll
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convert-2-addr-3-addr-inc64.ll
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copy-eflags.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
copy-propagation.ll
…
copysign-constant-magnitude.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
cpus-amd-no-x86_64.ll
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cpus-amd.ll
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cpus-intel-no-x86_64.ll
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cpus-intel.ll
[X86] -march=cooperlake (llvm)
2019-06-07 08:31:35 +00:00
cpus-no-x86_64.ll
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cpus-other.ll
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crash-lre-eliminate-dead-def.ll
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crash-nosse.ll
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crash-O0.ll
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crash.ll
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critical-anti-dep-breaker.ll
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critical-edge-split-2.ll
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cse-add-with-overflow.ll
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cstring.ll
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ctor-priority-coff.ll
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ctpop-combine.ll
[SDAG] expand ctpop != 1
2019-06-25 14:46:52 +00:00
cvt16.ll
…
cvtv2f32.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
cxx_tlscc64.ll
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dag-fmf-cse.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
dag-merge-fast-accesses.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
dag-optnone.ll
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dag-rauw-cse.ll
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dag-update-nodetomatch.ll
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dagcombine-and-setcc.ll
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dagcombine-buildvector.ll
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dagcombine-cse.ll
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dagcombine-select.ll
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dagcombine-shifts.ll
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dagcombine-tokenfactor-limit-crash.ll
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dagcombine-unsafe-math.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
darwin-bzero.ll
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darwin-no-dead-strip.ll
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darwin-preemption.ll
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darwin-quote.ll
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darwin-tls.ll
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dbg-baseptr.ll
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dbg-changes-codegen-branch-folding2.mir
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dbg-changes-codegen-branch-folding.ll
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dbg-changes-codegen.ll
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dbg-combine.ll
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dbg-line-0-no-discriminator.ll
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dbg-value-superreg-copy.mir
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DbgValueOtherTargets.test
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debug-loclists.ll
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debug-nodebug-crash.ll
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debuginfo-locations-dce.ll
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debugloc-argsize.ll
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debugloc-no-line-0.ll
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deopt-bundles.ll
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deopt-intrinsic-cconv.ll
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deopt-intrinsic.ll
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disable-tail-calls.ll
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discontiguous-loops.ll
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discriminate-mem-ops-missing-info.ll
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discriminate-mem-ops-skip-pfetch.ll
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discriminate-mem-ops.ll
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div8.ll
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div-rem-pair-recomposition-signed.ll
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
2019-07-25 16:39:57 +00:00
div-rem-pair-recomposition-unsigned.ll
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
2019-07-25 16:39:57 +00:00
div-rem-simplify.ll
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divide-by-constant.ll
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divide-windows-itanium.ll
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divrem8_ext.ll
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divrem.ll
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dllexport-x86_64.ll
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dllexport.ll
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dllimport-x86_64.ll
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dllimport.ll
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dollar-name.ll
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domain-reassignment-implicit-def.ll
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domain-reassignment-test.ll
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domain-reassignment.mir
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dont-trunc-store-double-to-float.ll
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dropped_constructor.ll
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dwarf-comp-dir.ll
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dwarf-eh-prepare.ll
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dwarf-headers.ll
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dwarf-split-line-1.ll
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dwarf-split-line-2.ll
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dyn_alloca_aligned.ll
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dyn-stackalloc.ll
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dynamic-alloca-in-entry.ll
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dynamic-alloca-lifetime.ll
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dynamic-allocas-VLAs.ll
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dynamic-regmask.ll
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DynamicCalleeSavedRegisters.ll
[X86] Regenerate callee-saved test checks to make D65354 diff easier
2019-07-31 12:29:07 +00:00
early-cfi-sections.ll
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early-ifcvt-crash.ll
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early-ifcvt.ll
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eh_frame.ll
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eh-frame-unreachable.ll
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eh-label.ll
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eh-nolandingpads.ll
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eh-null-personality.ll
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eh-unknown.ll
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eip-addressing-i386.ll
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element-wise-atomic-memory-intrinsics.ll
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elf-associated.ll
Revert r367501 "Create unique, but identically-named ELF sections..."
2019-08-07 20:45:23 +00:00
elf-comdat2.ll
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elf-comdat.ll
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emit-big-cst.ll
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empty-function.ll
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empty-functions.ll
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empty-struct-return-type.ll
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emutls_generic.ll
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emutls-pic.ll
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emutls-pie.ll
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emutls.ll
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enqcmd-intrinsics.ll
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epilogue-cfi-fp.ll
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epilogue-cfi-no-fp.ll
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epilogue.ll
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equiv_with_fndef.ll
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equiv_with_vardef.ll
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evex-to-vex-compress.mir
[X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr CodeGenOnly instructions.
2019-06-18 03:23:15 +00:00
exception-label.ll
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exedeps-movq.ll
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exedepsfix-broadcast.ll
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expand-integer-x86_64-intrinsic-error.ll
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expand-opaque-const.ll
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expand-post-ra-pseudo.mir
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expand-vr64-gr64-copy.mir
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extend-set-cc-uses-dbg.ll
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extend.ll
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extended-fma-contraction.ll
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extern_weak.ll
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extmul64.ll
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extmul128.ll
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extract-bits.ll
[X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness
2019-06-26 12:19:47 +00:00
extract-combine.ll
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extract-concat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
extract-extract.ll
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extract-fp.ll
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extract-insert.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
extract-lowbits.ll
[X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness
2019-06-26 12:19:47 +00:00
extract-store.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
extractelement-fp.ll
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extractelement-from-arg.ll
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extractelement-index.ll
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extractelement-legalization-cycle.ll
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extractelement-legalization-store-ordering.ll
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extractelement-load.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
extractelement-shuffle.ll
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extractps.ll
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f16c-intrinsics-fast-isel.ll
…
f16c-intrinsics.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fabs.ll
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fadd-combines.ll
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fast-cc-callee-pops.ll
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fast-cc-merge-stack-adj.ll
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fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
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fast-isel-agg-constant.ll
…
fast-isel-args-fail2.ll
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fast-isel-args-fail.ll
…
fast-isel-args.ll
…
fast-isel-atomic.ll
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fast-isel-avoid-unnecessary-pic-base.ll
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fast-isel-bail.ll
…
fast-isel-bc.ll
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fast-isel-bitcasts-avx512.ll
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fast-isel-bitcasts-avx.ll
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fast-isel-bitcasts.ll
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fast-isel-branch_weights.ll
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fast-isel-call-bool.ll
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fast-isel-call-cleanup.ll
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fast-isel-call.ll
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fast-isel-cmp-branch2.ll
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fast-isel-cmp-branch3.ll
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fast-isel-cmp-branch.ll
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fast-isel-cmp.ll
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fast-isel-constant.ll
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fast-isel-constpool.ll
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fast-isel-constrain-store-indexreg.ll
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fast-isel-deadcode.ll
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fast-isel-divrem-x86-64.ll
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fast-isel-divrem.ll
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fast-isel-double-half-convertion.ll
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fast-isel-emutls.ll
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fast-isel-expect.ll
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fast-isel-extract.ll
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fast-isel-float-half-convertion.ll
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fast-isel-fneg-kill.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
fast-isel-fneg.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
fast-isel-fold-mem.ll
…
fast-isel-fptrunc-fpext.ll
…
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
…
fast-isel-int-float-conversion.ll
…
fast-isel-load-i1.ll
…
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
…
fast-isel-noplt-pic.ll
…
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
…
fast-isel-select-cmov.ll
…
fast-isel-select-cmp.ll
…
fast-isel-select-pseudo-cmov.ll
…
fast-isel-select-sse.ll
…
fast-isel-select.ll
…
fast-isel-sext-zext.ll
…
fast-isel-sext.ll
…
fast-isel-shift.ll
…
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
…
fast-isel-store.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
…
fast-isel-uint-float-conversion.ll
…
fast-isel-vecload.ll
…
fast-isel-x32.ll
…
fast-isel-x86-64.ll
…
fast-isel-x86.ll
…
fast-isel.ll
…
fastcall-correct-mangling.ll
…
fastcc3struct.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
…
fastmath-float-half-conversion.ll
…
fcmove.ll
…
fcmp-constant.ll
…
fdiv-combine-vec.ll
…
fdiv-combine.ll
adding more fmf propagation for selects plus updated tests
2019-06-15 04:53:51 +00:00
fdiv.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
fentry-insertion.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
file-directive.ll
…
file-source-filename.ll
…
finite-libcalls.ll
…
fixed-stack-di-mir.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
fixup-bw-copy.ll
…
fixup-bw-copy.mir
…
fixup-bw-inst.ll
…
fixup-bw-inst.mir
…
fixup-lea.ll
…
flags-copy-lowering.mir
…
float-asmprint.ll
…
float-conv-elim.ll
…
floor-soft-float.ll
…
fltused_function_pointer.ll
…
fltused_math.ll
…
fltused.ll
…
fma4-commute-x86.ll
…
fma4-fneg-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll"
2019-06-13 19:25:03 +00:00
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
…
fma4-intrinsics-x86.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll"
2019-06-13 19:24:54 +00:00
fma4-scalar-memfold.ll
…
fma_patterns_wide.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll"
2019-06-13 19:25:09 +00:00
fma_patterns.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll"
2019-06-13 19:25:06 +00:00
fma-commute-x86.ll
…
fma-do-not-commute.ll
…
fma-fneg-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll"
2019-06-13 19:24:41 +00:00
fma-intrinsics-canonical.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll"
2019-06-13 19:24:47 +00:00
fma-intrinsics-fast-isel.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
…
fma-intrinsics-x86.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll"
2019-06-13 19:24:57 +00:00
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll"
2019-06-13 19:25:00 +00:00
fma-scalar-memfold.ll
…
fma.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
fmaddsub-combine.ll
…
fmaxnum.ll
…
fmf-flags.ll
…
fmf-propagation.ll
Propagate fmf for setcc in SDAG for select folds
2019-06-03 21:53:26 +00:00
fminnum.ll
…
fmsubadd-combine.ll
…
fmul-combines.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fnabs.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll"
2019-06-13 19:25:12 +00:00
fold-add.ll
…
fold-and-shift-x86_64.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load-binops.ll
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.
2019-06-11 04:30:53 +00:00
fold-load-unops.ll
[X86] Teach selectScalarSSELoad to not narrow volatile loads.
2019-06-27 05:51:56 +00:00
fold-load-vec.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
fold-push.ll
…
fold-rmw-ops.ll
…
fold-sext-trunc.ll
…
fold-tied-op.ll
…
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
…
fold-vector-sext-crash.ll
…
fold-vector-sext-zext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
…
fold-vector-trunc-sitofp.ll
…
fold-vex.ll
…
fold-xmm-zero.ll
…
fold-zext-trunc.ll
…
fops-windows-itanium.ll
…
force-align-stack-alloca.ll
…
force-align-stack.ll
…
fp2sint.ll
…
fp128-calling-conv.ll
…
fp128-cast.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
fp128-compare.ll
…
fp128-extract.ll
…
fp128-g.ll
…
fp128-i128.ll
…
fp128-libcalls.ll
…
fp128-load.ll
…
fp128-select.ll
…
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-arith.ll
…
fp-cvt.ll
…
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
…
fp-fast.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fp-fold.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-intrinsics.ll
…
fp-load-trunc.ll
…
fp-logic-replace.ll
…
fp-logic.ll
…
fp-select-cmp-and.ll
…
fp-stack-2results.ll
…
fp-stack-compare-cmov.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-stack-compare.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-stack-direct-ret.ll
…
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fp-stack.ll
…
fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fpcmp-soft-fp.ll
…
fpstack-debuginstr-kill.ll
…
fptosi-constant.ll
…
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frameaddr.ll
…
frameregister.ll
…
frem-msvc32.ll
…
fsgsbase.ll
…
fshl.ll
…
fshr.ll
…
fsxor-alignment.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
ftrunc.ll
…
full-lsr.ll
…
funclet-layout.ll
…
function-alias.ll
…
function-subtarget-features-2.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
…
ga-offset2.ll
…
ga-offset.ll
…
gather-addresses.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
gcc_except_table_functions.ll
…
gcc_except_table.ll
…
gep-expanded-vector.ll
…
getelementptr.ll
…
gfni-intrinsics.ll
…
ghc-cc64.ll
…
ghc-cc.ll
…
global-access-pie-copyrelocs.ll
…
global-access-pie.ll
…
global-fill.ll
…
global-sections-comdat.ll
…
global-sections-tls.ll
…
global-sections.ll
…
gnu-seh-nolpads.ll
…
gpr-to-mask.ll
…
greedy_regalloc_bad_eviction_sequence.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
…
haddsub-3.ll
…
haddsub-shuf.ll
[X86][AVX] Add broadcast(v4f64 hadd) test
2019-06-13 11:42:32 +00:00
haddsub-undef.ll
…
haddsub.ll
[x86] add tests for reductions that might be better with more horizontal ops; NFC
2019-07-15 16:59:38 +00:00
half.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
handle-move.ll
…
hhvm-cc.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
…
hipe-cc.ll
…
hipe-prologue.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
hoist-common.ll
…
hoist-invariant-load.ll
…
hoist-spill-lpad.ll
…
hoist-spill.ll
…
horizontal-reduce-smax.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-smin.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-umax.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-umin.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-shuffle-demanded.ll
…
horizontal-shuffle.ll
…
huge-stack-offset2.ll
…
huge-stack-offset.ll
…
i1narrowfail.ll
…
i2k.ll
…
i16lshr8pat.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
i64-mem-copy.ll
…
i64-to-float.ll
…
i128-add.ll
[X86] getTargetConstantBitsFromNode - remove unnecessary getZExtValue() (PR42486)
2019-07-02 18:20:38 +00:00
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
…
i256-add.ll
…
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
…
icall-branch-funnel.ll
[CodeGen] Make branch funnels pass the machine verifier
2019-07-03 17:16:45 +00:00
icmp-opt.ll
…
ident-metadata.ll
…
ifunc-asm.ll
…
illegal-bitfield-loadstore.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
…
immediate_merging64.ll
…
immediate_merging.ll
…
implicit-faultmap.ll
…
implicit-null-check-negative.ll
…
implicit-null-check.ll
…
implicit-null-checks.mir
…
implicit-null-chk-reg-rewrite.mir
…
implicit-use-spill.mir
…
imul-lea-2.ll
…
imul-lea.ll
…
imul.ll
…
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inc-of-add.ll
[NFC][Codegen][X86][AArch64][ARM][PowerPC] Recommit: Add test coverage for "add-of-inc" vs "sub-of-not"
2019-07-02 16:48:49 +00:00
inconsistent_landingpad.ll
…
indirect-branch-tracking-r2.ll
…
indirect-branch-tracking.ll
…
indirect-hidden.ll
…
init-priority.ll
…
inline-0bh.ll
…
inline-asm-2addr.ll
…
inline-asm-A-constraint.ll
…
inline-asm-avx512f-v-constraint.ll
…
inline-asm-avx512f-x-constraint.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
…
inline-asm-bad-constraint-n.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-bad-modifier.ll
…
inline-asm-default-clobbers.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
inline-asm-duplicated-constraint.ll
…
inline-asm-e-constraint.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-error.ll
…
inline-asm-flag-clobber.ll
…
inline-asm-flag-output.ll
…
inline-asm-fpstack.ll
…
inline-asm-h.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-imm-out-of-range.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-modifier-c.ll
…
inline-asm-modifier-n.ll
…
inline-asm-modifier-q.ll
…
inline-asm-modifier-V.ll
…
inline-asm-mrv.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-n-constraint.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
…
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
…
inline-asm-stack-realign3.ll
…
inline-asm-stack-realign.ll
…
inline-asm-tied.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
inline-sse.ll
…
inlineasm-sched-bug.ll
Stricter check for the memory access.
2019-07-27 18:57:59 +00:00
inreg.ll
…
ins_split_regalloc.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-into-constant-vector.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
insert-loaded-scalar.ll
…
insert-positions.ll
…
insert-prefetch-inline.afdo
…
insert-prefetch-inline.ll
…
insert-prefetch-invalid-instr.afdo
…
insert-prefetch-invalid-instr.ll
…
insert-prefetch-other.afdo
…
insert-prefetch.afdo
…
insert-prefetch.ll
…
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
insertelement-shuffle.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
insertelement-var-index.ll
…
insertelement-zero.ll
…
insertps-combine.ll
[X86] XFormVExtractWithShuffleIntoLoad - handle shuffle mask scaling
2019-08-08 16:05:23 +00:00
insertps-from-constantpool.ll
…
insertps-O0-bug.ll
…
insertps-unfold-load-bug.ll
…
instr-symbols.mir
…
int-intrinsic.ll
…
intersect-fma-fmf.ll
…
interval-update-remat.ll
…
invalid-liveness.mir
…
invalid-shift-immediate.ll
…
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
RegUsageInfoCollector: Skip AMDGPU entry point functions
2019-07-05 23:33:43 +00:00
ipra-local-linkage.ll
…
ipra-reg-alias.ll
…
ipra-reg-usage.ll
RegUsageInfoCollector: Skip AMDGPU entry point functions
2019-07-05 23:33:43 +00:00
ipra-transform.ll
…
is-constant.ll
…
isel-optnone.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
[X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)
2019-07-11 15:56:33 +00:00
known-bits-vector.ll
[x86] try to keep FP casted+truncated+extracted vector element out of GPRs
2019-07-15 18:17:23 +00:00
known-bits.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
known-signbits-vector.ll
[x86] try to keep FP casted+truncated+extracted vector element out of GPRs
2019-07-15 18:17:23 +00:00
kshift.ll
[X86][SSE] X86TargetLowering::isCommutativeBinOp - add PCMPEQ
2019-06-26 14:40:49 +00:00
label-annotation.ll
…
label-heapallocsite.ll
Recommit "[MS] Emit S_HEAPALLOCSITE debug info in Selection DAG"
2019-08-07 22:49:40 +00:00
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
…
lakemont.ll
…
large-code-model-isel.ll
…
large-constants.ll
…
large-gep-chain.ll
…
large-gep-scale.ll
…
large-global.ll
…
large-pic-string.ll
…
late-address-taken.ll
…
late-remat-update-2.mir
…
late-remat-update.mir
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-5.ll
…
lea-dagdag.ll
…
lea-opt-cse1.ll
…
lea-opt-cse2.ll
…
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
…
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
…
lea-recursion.ll
…
lea.ll
…
leaf-fp-elim.ll
…
leaFixup32.mir
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leaFixup64.mir
…
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
…
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
…
legalize-vaarg.ll
[SelectionDAG] Legalize vaargs that require vector splitting
2019-06-18 12:24:02 +00:00
legalizedag_vec.ll
…
libcall-sret.ll
…
licm-dominance.ll
…
licm-nested.ll
…
licm-regpressure.ll
…
licm-symbol.ll
…
lifetime-alias.ll
…
limit-split-cost.mir
…
limited-prec.ll
…
linux-preemption.ll
…
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
live-out-reg-info.ll
…
live-range-nosubreg.ll
…
liveness-local-regalloc.ll
…
llc-override-mcpu-mattr.ll
…
llc-print-machineinstrs.mir
…
llc-start-stop-instance.ll
…
llrint-conv-i32.ll
…
llrint-conv.ll
…
llround-conv-i32.ll
…
llround-conv.ll
…
load-combine-dbg.ll
…
load-combine.ll
…
load-local-v3i1.ll
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load-partial.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
load-scalar-as-vector.ll
…
load-slice.ll
…
loadStore_vectorizer.ll
…
loc-remat.ll
…
local_stack_symbol_ordering.ll
…
localescape.ll
…
log2_not_readnone.ll
…
logical-load-fold.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
loop-hoist.ll
…
loop-rotate.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
loop-search.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
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loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
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loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
…
loop-strength-reduce.ll
…
lower-bitcast.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
lower-vec-shift-2.ll
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lower-vec-shift.ll
…
lower-vec-shuffle-bug.ll
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lrint-conv-i32.ll
…
lrint-conv.ll
…
lround-conv-i32.ll
…
lround-conv.ll
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lrshrink.ll
[X86] Regenerate lrshrink test checks to make D65354 diff easier
2019-07-31 12:30:24 +00:00
lsr-crash-empty-uses.ll
…
lsr-delayed-fold.ll
…
lsr-i386.ll
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lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
lsr-negative-stride.ll
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lsr-nonaffine.ll
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lsr-normalization.ll
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lsr-overflow.ll
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lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
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lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lzcnt-tzcnt.ll
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lzcnt-zext-cmp.ll
…
lzcnt.ll
…
macCatalyst.ll
[macCatalyst] Use macCatalyst pretty name in .build_version darwin
2019-07-12 22:06:08 +00:00
machine-combiner-int-vec.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
machine-combiner-int.ll
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machine-combiner.ll
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machine-copy-prop.mir
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machine-cp-debug.mir
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machine-cp.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
machine-cse.ll
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machine-outliner-debuginfo.ll
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machine-outliner-disubprogram.ll
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machine-outliner-noredzone.ll
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machine-outliner-tailcalls.ll
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machine-outliner.ll
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machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
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machine-sink.ll
…
machine-trace-metrics-crash.ll
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MachineBranchProb.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
…
MachineSink-eflags.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
machinesink-merge-debuginfo.ll
[debug-info] Make a couple of tests more robust.
2019-06-27 15:53:07 +00:00
machinesink-null-debuginfo.ll
[debug-info] Make a couple of tests more robust.
2019-06-27 15:53:07 +00:00
MachineSink-PHIUse.ll
…
MachineSink-SubReg.ll
…
macho-comdat.ll
…
macho-trap.ll
…
madd.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mangle-question-mark.ll
…
mask-negated-bool.ll
…
masked_compressstore.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_expandload.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_gather_scatter_widen.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
masked_gather_scatter.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_gather.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches.
2019-07-31 22:58:15 +00:00
masked_load.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store_trunc_ssat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store_trunc_usat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store_trunc.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
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mature-mc-support.ll
…
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
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mcu-abi.ll
…
mem-intrin-base-reg.ll
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mem-promote-integers.ll
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membarrier.ll
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memcmp-mergeexpand.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcmp-minsize.ll
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memcmp-optsize.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcmp.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcpy-2.ll
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memcpy-from-string.ll
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memcpy-struct-by-value.ll
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memcpy.ll
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mempcpy-32.ll
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mempcpy.ll
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memset64-on-x86-32.ll
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memset-2.ll
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memset-3.ll
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memset-nonzero.ll
[x86] split more 256-bit stores of concatenated vectors
2019-06-05 16:40:57 +00:00
memset-sse-stack-realignment.ll
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memset-zero.ll
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memset.ll
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merge_store_duplicated_loads.ll
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merge_store.ll
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merge-consecutive-loads-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
merge-consecutive-loads-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
merge-consecutive-loads-512.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
merge-consecutive-stores-i1.ll
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merge-consecutive-stores-nt.ll
[X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it
2019-07-09 19:55:28 +00:00
merge-consecutive-stores.ll
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merge-sp-update-lea.ll
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merge-sp-updates-cfi.ll
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merge-store-constants.ll
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merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
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MergeConsecutiveStores.ll
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mfence.ll
…
midpoint-int-vec-128.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
midpoint-int-vec-256.ll
[x86] narrow extract subvector of vector select
2019-06-07 13:17:46 +00:00
midpoint-int-vec-512.ll
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midpoint-int.ll
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min-legal-vector-width.ll
[X86] Allow pack instructions to be used for 512->256 truncates when -mprefer-vector-width=256 is causing 512-bit vectors to be split
2019-08-07 21:16:10 +00:00
mingw-alloca.ll
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mingw-comdats-xdata.ll
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mingw-comdats.ll
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mingw-refptr.ll
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misaligned-memset.ll
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misched_phys_reg_assign_order.ll
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misched-aa-colored.ll
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misched-aa-mmos.ll
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misched-balance.ll
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misched-code-difference-with-debug.ll
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misched-copy.ll
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misched-crash.ll
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misched-fusion.ll
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misched-ilp.ll
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misched-matmul.ll
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misched-matrix.ll
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misched-new.ll
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mmx-arg-passing-x86-64.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-arg-passing.ll
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mmx-arith.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-bitcast-fold.ll
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mmx-bitcast.ll
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mmx-build-vector.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
mmx-coalescing.ll
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mmx-copy-gprs.ll
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mmx-cvt.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-fold-load.ll
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mmx-fold-zero.ll
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mmx-intrinsics.ll
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mmx-only.ll
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mod128.ll
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movbe.ll
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movddup-load-fold.ll
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movdir-intrinsic-x86_64.ll
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movdir-intrinsic-x86.ll
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move_latch_to_loop_top.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
movfs.ll
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movgs.ll
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movmsk-cmp.ll
[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles
2019-06-26 09:50:11 +00:00
movmsk.ll
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movntdq-no-avx.ll
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movpc32-check.ll
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movtopush64.ll
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movtopush.ll
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movtopush.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
ms-inline-asm-avx512.ll
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ms-inline-asm-redundant-clobber.ll
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ms-inline-asm.ll
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mul64.ll
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mul128_sext_loop.ll
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mul128.ll
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mul-constant-i8.ll
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mul-constant-i16.ll
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mul-constant-i32.ll
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mul-constant-i64.ll
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mul-constant-result.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
mul-i256.ll
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mul-i512.ll
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mul-i1024.ll
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mul-legalize.ll
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mul-remat.ll
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mul-shift-reassoc.ll
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mulo-pow2.ll
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muloti.ll
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mult-alt-generic-i686.ll
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mult-alt-generic-x86_64.ll
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mult-alt-x86.ll
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multiple-loop-post-inc.ll
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multiple-return-values-cross-block.ll
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mulvi32.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mulx32.ll
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mulx64.ll
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musttail-fastcall.ll
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musttail-indirect.ll
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musttail-thiscall.ll
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musttail-varargs.ll
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musttail.ll
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mwaitx.ll
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named-reg-alloc.ll
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named-reg-notareg.ll
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nancvt.ll
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narrow_op-1.ll
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narrow-shl-cst.ll
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narrow-shl-load.ll
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neg_cmp.ll
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neg_fp.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
neg-of-3ops-lea.ll
[X86][Codegen] Add missed pattern that may be a lea+neg
2019-06-08 19:38:14 +00:00
neg-shl-add.ll
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negate-add-zero.ll
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negate-i1.ll
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negate-shift.ll
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negate.ll
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negative_zero.ll
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negative-offset.ll
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negative-sin.ll
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negative-stride-fptosi-user.ll
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negative-subscript.ll
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new-remat.ll
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newline-and-quote.ll
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no-and8ri8.ll
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no-cmov.ll
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no-plt-libcalls.ll
Add, and infer, a nofree function attribute
2019-07-08 15:57:56 +00:00
no-plt.ll
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no-prolog-kill.ll
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no-sse2-avg.ll
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no-stack-arg-probe.ll
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nobt.ll
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nocf_check.ll
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nocx16.ll
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non-lazy-bind.ll
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non-unique-sections.ll
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non-value-mem-operand.mir
[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.
2019-06-18 03:23:11 +00:00
nonconst-static-ev.ll
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nonconst-static-iv.ll
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nontemporal-2.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
nontemporal-3.ll
[X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026)
2019-06-17 18:20:04 +00:00
nontemporal-loads-2.ll
[X86][SSE] Add tests for underaligned nt loads
2019-06-17 14:38:17 +00:00
nontemporal-loads.ll
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nontemporal.ll
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noreturn-call.ll
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norex-subreg.ll
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nosse-error1.ll
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nosse-error2.ll
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nosse-varargs.ll
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nosse-vector.ll
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not-and-simplify.ll
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note-cet-property.ll
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note-sections.ll
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null-streamer.ll
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O0-pipeline.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
O3-pipeline.ll
[MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
2019-07-19 12:58:16 +00:00
objc-gc-module-flags.ll
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object-size.ll
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oddshuffles.ll
[X86][SSE] matchBinaryPermuteShuffle - split INSERTPS combines
2019-08-08 13:23:53 +00:00
oddsubvector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)
2019-06-27 21:52:10 +00:00
opaque-constant-asm.ll
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opt_phis2.mir
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opt_phis.mir
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opt-ext-uses.ll
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opt-shuff-tstore.ll
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optimize-max-0.ll
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optimize-max-1.ll
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optimize-max-2.ll
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optimize-max-3.ll
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or-address.ll
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or-branch.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
or-lea.ll
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osx-private-labels.ll
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overflow-intrinsic-setcc-fold.ll
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overflow.ll
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overlap-shift.ll
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packed_struct.ll
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packss.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
paddus.ll
[X86] Add DAG combine to fold any_extend_vector_inreg+truncstore to an extractelement+store
2019-07-31 22:43:08 +00:00
palignr.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
parity.ll
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partial-fold32.ll
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partial-fold64.ll
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partition.ll
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pass-three.ll
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patchable-prologue.ll
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patchpoint-invoke.ll
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patchpoint-verifiable.mir
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patchpoint-webkit_jscc.ll
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patchpoint.ll
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pause.ll
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peep-setb.ll
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peep-test-0.ll
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peep-test-1.ll
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peep-test-2.ll
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peep-test-3.ll
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peep-test-4.ll
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peephole-cvt-sse.ll
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peephole-fold-movsd.ll
[X86] Regenerate load fold peephole test.
2019-07-04 12:33:37 +00:00
peephole-fold-testrr.mir
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
peephole-multiple-folds.ll
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peephole-na-phys-copy-folding.ll
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peephole-recurrence.mir
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peephole.mir
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personality_size.ll
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personality.ll
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phaddsub-extract.ll
[DAGCombine] matchBinOpReduction - add partial reduction matching
2019-07-24 17:29:56 +00:00
phaddsub-undef.ll
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phaddsub.ll
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phi-bit-propagation.ll
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phi-immediate-factoring.ll
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phielim-split.ll
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phys_subreg_coalesce-2.ll
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phys_subreg_coalesce-3.ll
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phys_subreg_coalesce.ll
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phys-reg-local-regalloc.ll
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physreg-pairs-error.ll
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physreg-pairs.ll
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pic_jumptable.ll
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pic-load-remat.ll
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pic.ll
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pie.ll
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pku.ll
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pmaddubsw.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pmovext.ll
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pmovsx-inreg.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
pmul.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
pmulh.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
pmulld.ll
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pointer-vector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pop-stack-cleanup-msvc.ll
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pop-stack-cleanup.ll
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popcnt.ll
[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.
2019-07-04 22:53:57 +00:00
post-ra-sched-with-debug.mir
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post-ra-sched.ll
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postalloc-coalescing.ll
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postra-ignore-dbg-instrs.mir
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postra-licm.ll
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pow.75.ll
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pow.ll
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powi.ll
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pr1462.ll
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pr1489.ll
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pr1505.ll
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pr1505b.ll
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pr2177.ll
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pr2182.ll
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pr2326.ll
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pr2585.ll
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pr2656.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
pr2659.ll
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pr2849.ll
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pr2924.ll
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pr2982.ll
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pr3154.ll
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pr3216.ll
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pr3241.ll
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pr3243.ll
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pr3244.ll
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pr3250.ll
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pr3317.ll
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pr3366.ll
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pr3457.ll
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pr3522.ll
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pr5145.ll
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pr7882.ll
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pr9127.ll
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pr9517.ll
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pr9743.ll
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pr10068.ll
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pr10475.ll
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pr10499.ll
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pr10523.ll
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pr10524.ll
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pr10525.ll
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pr10526.ll
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pr11202.ll
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pr11334.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
pr11415.ll
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pr11468.ll
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pr11985.ll
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pr11998.ll
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pr12360.ll
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pr12889.ll
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pr13209.ll
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pr13220.ll
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pr13458.ll
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pr13577.ll
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pr13859.ll
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pr13899.ll
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pr14088.ll
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pr14098.ll
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pr14161.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr14204.ll
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pr14314.ll
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pr14333.ll
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pr14562.ll
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pr15267.ll
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pr15296.ll
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pr15309.ll
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pr15705.ll
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pr15981.ll
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pr16031.ll
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pr16360.ll
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pr16807.ll
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pr17546.ll
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pr17631.ll
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pr17764.ll
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pr18014.ll
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pr18054.ll
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pr18162.ll
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pr18344.ll
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pr18846.ll
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pr19049.ll
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pr20011.ll
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pr20012.ll
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pr20020.ll
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pr20088.ll
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pr21099.ll
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pr21792.ll
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pr22019.ll
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pr22103.ll
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pr22338.ll
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pr22473.ll
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pr22774.ll
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pr22970.ll
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pr23103.ll
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pr23246.ll
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pr23273.ll
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pr23603.ll
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pr23664.ll
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pr24139.ll
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pr24374.ll
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pr24602.ll
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pr25828.ll
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pr26350.ll
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pr26625.ll
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pr26652.ll
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pr26757.ll
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pr26835.ll
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pr26870.ll
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pr27071.ll
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pr27202.ll
[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.
2019-07-04 22:53:57 +00:00
pr27501.ll
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pr27591.ll
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pr27681.mir
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pr28129.ll
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pr28173.ll
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pr28444.ll
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pr28472.ll
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pr28489.ll
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pr28515.ll
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pr28560.ll
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pr28824.ll
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pr29010.ll
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pr29022.ll
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pr29061.ll
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pr29112.ll
[X86][SSE] matchBinaryPermuteShuffle - split INSERTPS combines
2019-08-08 13:23:53 +00:00
pr29170.ll
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pr29222.ll
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pr30284.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
pr30290.ll
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pr30430.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
pr30511.ll
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pr30562.ll
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pr30813.ll
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pr30821.mir
[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.
2019-06-18 03:23:11 +00:00
pr31045.ll
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pr31088.ll
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pr31143.ll
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pr31242.ll
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pr31271.ll
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pr31323.ll
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pr31593.ll
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pr31773.ll
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pr31956.ll
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pr32108.ll
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pr32241.ll
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pr32256.ll
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pr32278.ll
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pr32282.ll
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pr32284.ll
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pr32329.ll
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pr32340.ll
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pr32345.ll
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pr32368.ll
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pr32420.ll
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pr32451.ll
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pr32484.ll
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pr32515.ll
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pr32588.ll
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pr32610.ll
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pr32659.ll
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pr32907.ll
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pr33010.ll
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pr33290.ll
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pr33349.ll
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pr33396.ll
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pr33715.ll
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pr33747.ll
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pr33828.ll
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pr33954.ll
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pr33960.ll
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pr34080-2.ll
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pr34080.ll
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pr34088.ll
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pr34137.ll
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pr34139.ll
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pr34149.ll
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pr34177.ll
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pr34271-1.ll
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pr34271.ll
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pr34292.ll
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pr34381.ll
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pr34397.ll
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pr34421.ll
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pr34592.ll
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pr34605.ll
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pr34629.ll
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pr34634.ll
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pr34653.ll
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pr34657.ll
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pr34855.ll
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pr35272.ll
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pr35316.ll
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pr35399.ll
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pr35443.ll
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pr35636.ll
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pr35761.ll
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pr35763.ll
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pr35765.ll
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pr35918.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr35972.ll
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pr35982.ll
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pr36199.ll
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pr36274.ll
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pr36312.ll
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pr36553.ll
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pr36602.ll
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pr36865.ll
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pr37063.ll
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pr37264.ll
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pr37359.ll
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pr37499.ll
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pr37820.ll
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pr37826.ll
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pr37879.ll
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pr37916.ll
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pr38038.ll
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pr38185.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
pr38217.ll
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pr38533.ll
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pr38539.ll
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pr38639.ll
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pr38738.ll
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pr38743.ll
This reverts r365061 and r365062 (test update)
2019-07-05 12:42:06 +00:00
pr38762.ll
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pr38763.ll
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pr38795.ll
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pr38803.ll
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pr38819.ll
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pr38865-2.ll
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pr38865-3.ll
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pr38865.ll
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pr38952.mir
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pr39098.ll
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pr39187-g.ll
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pr39243.ll
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pr39666.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches for expandload/compressstore.
2019-08-02 23:43:53 +00:00
pr39733.ll
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pr39896.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
pr39926.ll
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pr40090.ll
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pr40289-64bit.ll
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pr40289.ll
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pr40529.ll
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pr40539.ll
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pr40631_deadstore_elision.ll
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pr40730.ll
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pr40737.ll
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pr40811.ll
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pr40891.ll
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pr40994.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr41619.ll
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pr41678.ll
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pr41748.ll
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pr42452.ll
[X86] Improve the type checking fast-isel handling of vector bitcasts.
2019-07-01 07:09:34 +00:00
pr42565.ll
[X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass.
2019-07-11 01:01:39 +00:00
pr42616.ll
[X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287.
2019-07-14 04:13:33 +00:00
pr42727.ll
[SelectionDAG] makeEquivalentMemoryOrdering - early out for equal chains (PR42727)
2019-07-24 16:53:14 +00:00
pr42905.ll
[X86] Don't allow combineSIntToFP to create v2i32 vectors after type legalization.
2019-08-06 21:43:15 +00:00
pr42909.ll
[X86] Remove -x86-experimental-vector-widening-legalization command line option and all its uses.
2019-08-08 06:48:22 +00:00
PR34565.ll
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PR37310.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
PR40322.ll
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pre-coalesce-2.ll
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pre-coalesce.ll
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pre-coalesce.mir
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pre-ra-sched.ll
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prefer-avx256-lzcnt.ll
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prefer-avx256-mask-extend.ll
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prefer-avx256-mask-shuffle.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
prefer-avx256-popcnt.ll
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prefer-avx256-shift.ll
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prefer-avx256-trunc.ll
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prefer-avx256-wide-mul.ll
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prefetch.ll
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prefixdata.ll
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preserve_allcc64.ll
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preserve_mostcc64.ll
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private-2.ll
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private.ll
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probe-stack-x32.ll
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prolog-push-seq.ll
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prologepilog_deref_size.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
prologue-epilogue-remarks.mir
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prologuedata.ll
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promote-assert-zext.ll
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promote-i16.ll
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promote-trunc.ll
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promote-vec3.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT
2019-08-08 10:37:03 +00:00
promote.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ps4-noreturn.ll
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ps4-ssp-nop.ll
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pseudo_cmov_lower1.ll
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pseudo_cmov_lower2.ll
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pseudo_cmov_lower.ll
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pshufb-mask-comments.ll
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pshufd-combine-crash.ll
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psubus.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ptest.ll
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ptr-rotate.ll
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ptrtoint-constexpr.ll
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ptrtoint-narrow.ll
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ptwrite32-intrinsic.ll
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ptwrite64-intrinsic.ll
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pull-binop-through-shift.ll
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pull-conditional-binop-through-shift.ll
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push-cfi-debug.ll
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push-cfi-obj.ll
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push-cfi.ll
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ragreedy-bug.ll
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ragreedy-hoist-spill.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
ragreedy-last-chance-recoloring.ll
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rd-mod-wr-eflags.ll
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rdpid.ll
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rdpmc.ll
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rdrand-x86_64.ll
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rdrand.ll
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rdseed-x86_64.ll
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rdseed.ll
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rdtsc-upgrade.ll
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rdtsc.ll
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read-fp-no-frame-pointer.ll
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recip-fastmath2.ll
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recip-fastmath.ll
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recip-pic.ll
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red-zone2.ll
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red-zone.ll
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reduce-trunc-shl.ll
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regalloc-advanced-split-cost.ll
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regalloc-copy-hints.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
regalloc-fast-missing-live-out-spill.mir
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regalloc-reconcile-broken-hints.ll
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regalloc-spill-at-ehpad.ll
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regcall-no-plt.ll
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reghinting.ll
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regparm.ll
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regpressure.ll
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relptr-rodata.ll
IR: Teach Constant::needsRelocation() that relative pointers don't need to be relocated.
2019-07-18 20:56:21 +00:00
rem_crash.ll
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rem.ll
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remarks-section.ll
Reland: [Remarks] Add support for serializing metadata for every remark streamer
2019-07-26 01:33:30 +00:00
remat-constant.ll
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remat-fold-load.ll
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remat-mov-0.ll
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remat-phys-dead.ll
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remat-scalar-zero.ll
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replace_unsupported_masked_mem_intrin.ll
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replace-load-and-with-bzhi.ll
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ret-addr.ll
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ret-i64-0.ll
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ret-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
retpoline-external.ll
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retpoline-regparm.ll
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retpoline.ll
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return_zeroext_i2.ll
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return-ext.ll
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returned-trunc-tail-calls.ll
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reverse_branches.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
rip-rel-address.ll
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rip-rel-lea.ll
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rodata-relocs.ll
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rot16.ll
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rot32.ll
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rot64.ll
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rotate2.ll
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rotate4.ll
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rotate_vec.ll
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rotate-extract-vector.ll
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rotate-extract.ll
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rotate-multi.ll
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rotate.ll
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rounding-ops.ll
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rrlist-livereg-corrutpion.ll
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rtm.ll
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sad_variations.ll
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sad.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sadd_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sadd_sat.ll
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saddo-redundant-add.ll
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safestack_inline.ll
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safestack_ssp.ll
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safestack.ll
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sandybridge-loads.ll
[x86] avoid vector load narrowing with extracted store uses (PR42305)
2019-06-19 18:13:47 +00:00
sar_fold64.ll
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sar_fold.ll
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sat-add.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
sbb.ll
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scalar_sse_minmax.ll
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scalar_widen_div.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
scalar-extract.ll
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scalar-fp-to-i64.ll
[X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.
2019-06-10 00:41:07 +00:00
scalar-int-to-fp.ll
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scalar-min-max-fill-operand.ll
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scalarize-bitcast.ll
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scalarize-fp.ll
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scatter-schedule.ll
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scavenger.mir
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scev-interchange.ll
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scheduler-backtracking.ll
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sdiv-exact.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sdiv-pow2.ll
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section_mergeable_size.ll
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segmented-stacks-dynamic.ll
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segmented-stacks-standalone.ll
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segmented-stacks.ll
[X86] for split stack, not save/restore nested arg if unused
2019-07-19 12:54:44 +00:00
seh-catch-all-win32.ll
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seh-catch-all.ll
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seh-catchpad.ll
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seh-except-finally.ll
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seh-exception-code.ll
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seh-filter-no-personality.ll
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seh-finally.ll
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seh-localaddress.ll
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seh-no-invokes.ll
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seh-safe-div-win32.ll
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seh-safe-div.ll
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seh-stack-realign.ll
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select_const.ll
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select_meta.ll
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select-1-or-neg1.ll
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select-mmx.ll
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select-of-fp-constants.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
select-with-and-or.ll
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select.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
selectcc-to-shiftand.ll
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selectiondag-crash.ll
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selectiondag-cse.ll
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selectiondag-debug-loc.ll
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selectiondag-dominator.ll
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selectiondag-order.ll
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setcc-combine.ll
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setcc-logic.ll
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setcc-lowering.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
setcc-narrowing.ll
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setcc-wide-types.ll
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setcc.ll
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setjmp-spills.ll
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setoeq.ll
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setuge.ll
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sext-i1.ll
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sext-load.ll
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sext-ret-val.ll
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sext-setcc-self.ll
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sext-subreg.ll
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sext-trunc.ll
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sha.ll
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shadow-stack.ll
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shift_minsize.ll
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shift-amount-mod.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
shift-and-x86_64.ll
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shift-and.ll
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shift-avx2-crash.ll
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shift-bmi2.ll
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shift-coalesce.ll
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shift-codegen.ll
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shift-combine-crash.ll
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shift-combine.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shift-double-x86_64.ll
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shift-double.ll
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shift-folding.ll
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shift-i128.ll
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shift-i256.ll
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shift-mask.ll
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shift-one.ll
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shift-pair.ll
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shift-parts.ll
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shift-pcmp.ll
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shl_elim.ll
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shl_undef.ll
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shl-anyext.ll
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shl-crash-on-legalize.ll
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shl-i64.ll
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shrink_vmul_sse.ll
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shrink_vmul.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask
2019-08-08 15:54:20 +00:00
shrink_wrap_dbg_value.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
shrink-compare.ll
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shrink-fp-const1.ll
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shrink-fp-const2.ll
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shrink-wrap-chkstk-x86_64.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
shrink-wrap-chkstk.ll
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shrink-wrapping-vla.ll
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shrinkwrap-hang.ll
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shuffle-combine-crash-2.ll
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shuffle-combine-crash.ll
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shuffle-extract-subvector.ll
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shuffle-of-insert.ll
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shuffle-of-splat-multiuses.ll
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shuffle-strided-with-offset-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-512.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-512.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sibcall-2.ll
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sibcall-3.ll
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sibcall-4.ll
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sibcall-5.ll
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sibcall-6.ll
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sibcall-byval.ll
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sibcall-win64.ll
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sibcall.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
signbit-shift.ll
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signed-truncation-check.ll
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simple-register-allocation-read-undef.mir
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simple-zext.ll
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sincos-opt.ll
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sincos.ll
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sink-addsub-of-const.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
sink-blockfreq.ll
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sink-cheap-instructions.ll
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sink-gep-before-mem-inst.ll
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sink-hoist.ll
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sink-local-value.ll
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sink-out-of-loop.ll
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sitofp.ll
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sjlj-baseptr.ll
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sjlj-eh.ll
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sjlj-shadow-stack-liveness.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
sjlj.ll
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slow-incdec.ll
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slow-pmulld.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
slow-unaligned-mem.ll
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small-byval-memcpy.ll
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smul_fix_sat_constants.ll
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smul_fix_sat.ll
[LegalizeTypes] Fix saturation bug for smul.fix.sat
2019-07-09 10:24:50 +00:00
smul_fix.ll
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smul-with-overflow.ll
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soft-fp-legal-in-HW-reg.ll
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soft-fp.ll
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soft-sitofp.ll
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speculative-load-hardening-call-and-ret.ll
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speculative-load-hardening-gather.ll
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speculative-load-hardening-indirect.ll
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speculative-load-hardening.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
splat-const.ll
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splat-for-size.ll
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split-eh-lpad-edges.ll
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split-extend-vector-inreg.ll
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split-store.ll
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split-vector-bitcast.ll
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split-vector-rem.ll
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sqrt-fastmath-mir.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
sqrt-fastmath-tune.ll
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sqrt-fastmath.ll
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sqrt-partial.ll
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sqrt.ll
…
srem-seteq-optsize.ll
[NFC][Codegen][X86][AArch64] Add "(x s% C) == 0" tests
2019-07-20 19:25:44 +00:00
srem-seteq-vec-nonsplat.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
srem-seteq-vec-splat.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
srem-seteq.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
sret-implicit.ll
…
sse1-fcopysign.ll
…
sse1.ll
…
sse2-intrinsics-canonical.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sse2-intrinsics-fast-isel-x86_64.ll
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sse2-intrinsics-fast-isel.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sse2-intrinsics-x86_64-upgrade.ll
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sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
…
sse2-intrinsics-x86.ll
…
sse2-vector-shifts.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sse2.ll
[X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets.
2019-07-08 06:52:43 +00:00
sse3-avx-addsub-2.ll
…
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
sse4a-intrinsics-fast-isel.ll
…
sse4a-upgrade.ll
…
sse4a.ll
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sse41-intrinsics-fast-isel.ll
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sse41-intrinsics-x86-upgrade.ll
…
sse41-intrinsics-x86.ll
…
sse41-pmovxrm.ll
…
sse41.ll
…
sse42-intrinsics-fast-isel-x86_64.ll
…
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86_64.ll
…
sse42-intrinsics-x86.ll
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sse_partial_update.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
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sse-align-12.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sse-commute.ll
…
sse-cvttp2si.ll
…
sse-domains.ll
…
sse-fcopysign.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
sse-fsignum.ll
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sse-intel-ocl.ll
…
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
[X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only.
2019-07-15 02:02:31 +00:00
sse-intrinsics-x86_64-upgrade.ll
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sse-intrinsics-x86_64.ll
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sse-intrinsics-x86-upgrade.ll
…
sse-intrinsics-x86.ll
…
sse-load-ret.ll
…
sse-minmax.ll
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sse-only.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
sse-regcall.ll
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sse-scalar-fp-arith-unary.ll
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sse-scalar-fp-arith.ll
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.
2019-06-11 04:30:53 +00:00
sse-unaligned-mem-feature.ll
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sse-varargs.ll
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ssp-data-layout.ll
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ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
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ssse3-intrinsics-x86.ll
…
ssub_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ssub_sat.ll
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stack_guard_remat.ll
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stack-align2.ll
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stack-align-memcpy.ll
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stack-align.ll
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stack-folding-3dnow.ll
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stack-folding-adx-x86_64.ll
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stack-folding-adx.mir
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stack-folding-avx512bf16.ll
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stack-folding-avx512vp2intersect.ll
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stack-folding-bmi2.ll
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stack-folding-bmi2.mir
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stack-folding-bmi.ll
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stack-folding-fp-avx1.ll
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stack-folding-fp-avx512.ll
[X86] Make a bunch of merge masked binops commutable for loading folding.
2019-06-06 21:00:04 +00:00
stack-folding-fp-avx512vl.ll
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stack-folding-fp-sse42.ll
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stack-folding-int-avx1.ll
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stack-folding-int-avx2.ll
…
stack-folding-int-avx512.ll
[X86] Make a bunch of merge masked binops commutable for loading folding.
2019-06-06 21:00:04 +00:00
stack-folding-int-avx512vl.ll
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stack-folding-int-sse42.ll
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stack-folding-lwp.ll
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stack-folding-mmx.ll
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stack-folding-sha.ll
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stack-folding-tbm.ll
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stack-folding-x86_64.ll
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stack-folding-xop.ll
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stack-probe-red-zone.ll
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stack-probe-size.ll
…
stack-probes.ll
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stack-protector-dbginfo.ll
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stack-protector-msvc.ll
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stack-protector-remarks.ll
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stack-protector-target.ll
…
stack-protector-vreg-to-vreg-copy.ll
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stack-protector-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
stack-protector.ll
StackProtector: Use PointerMayBeCaptured
2019-06-12 14:23:33 +00:00
stack-size-section-function-sections.ll
…
stack-size-section.ll
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stack-update-frame-opcode.ll
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StackColoring-dbg.ll
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StackColoring.ll
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stackguard-internal.ll
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stackmap-fast-isel.ll
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stackmap-frame-setup.ll
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stackmap-large-constants.ll
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stackmap-large-location-size.ll
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stackmap-liveness.ll
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stackmap-nops.ll
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stackmap-shadow-optimization.ll
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stackmap.ll
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stackpointer.ll
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statepoint-allocas.ll
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statepoint-call-lowering.ll
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statepoint-far-call.ll
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statepoint-forward.ll
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statepoint-gctransition-call-lowering.ll
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statepoint-invoke.ll
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statepoint-live-in.ll
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statepoint-no-realign-stack.ll
[Statepoints] Fix overalignment of loads in no-realign-stack functions
2019-08-02 20:17:37 +00:00
statepoint-stack-usage.ll
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statepoint-stackmap-format.ll
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statepoint-uniqueing.ll
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statepoint-vector-bad-spill.ll
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statepoint-vector.ll
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stdarg.ll
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stdcall-notailcall.ll
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stdcall.ll
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store_op_load_fold2.ll
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store_op_load_fold.ll
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store-empty-member.ll
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store-fp-constant.ll
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store-global-address.ll
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store-narrow.ll
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store-zero-and-minus-one.ll
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stores-merging.ll
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storetrunc-fp.ll
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stride-nine-with-base-reg.ll
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stride-reuse.ll
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sttni.ll
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sub-of-not.ll
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
2019-07-03 09:41:35 +00:00
sub-with-overflow.ll
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sub.ll
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subcarry.ll
[DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarry b, a, !c) and flip carry.
2019-07-16 15:17:00 +00:00
subreg-to-reg-0.ll
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subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
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subvector-broadcast.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
sunkaddr-ext.ll
…
swap.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
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swifterror.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
swiftself.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-default-only.ll
…
switch-density.ll
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switch-edge-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-jump-table.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-lower-peel-top-case.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-or.ll
…
switch-order-weight.ll
…
switch-zextload.ll
…
switch.ll
[test] Change comment wording (NFC)
2019-06-18 23:31:10 +00:00
SwitchLowering.ll
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swizzle-2.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
swizzle-avx2.ll
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SwizzleShuff.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
system-intrinsics-64-xsave.ll
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system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
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system-intrinsics-xgetbv.ll
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system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
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system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
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system-intrinsics-xsetbv.ll
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system-intrinsics.ll
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tail-call-attrs.ll
…
tail-call-casts.ll
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tail-call-conditional.mir
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tail-call-got.ll
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tail-call-legality.ll
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tail-call-mutable-memarg.ll
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tail-call-parameter-attrs-mismatch.ll
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tail-call-win64.ll
…
tail-dup-addr.ll
…
tail-dup-catchret.ll
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tail-dup-debugloc.ll
…
tail-dup-merge-loop-headers.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
tail-dup-no-other-successor.ll
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tail-dup-repeat.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
tail-merge-after-mbp.mir
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tail-merge-debugloc.ll
…
tail-merge-identical.ll
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tail-merge-unreachable.ll
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tail-merge-wineh.ll
…
tail-opts.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tail-threshold.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tailcall-64.ll
…
tailcall-calleesave.ll
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tailcall-cgp-dup.ll
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tailcall-disable.ll
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tailcall-fastisel.ll
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tailcall-largecode.ll
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tailcall-lifetime-end.ll
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tailcall-mem-intrinsics.ll
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tailcall-msvc-conventions.ll
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tailcall-multiret.ll
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tailcall-pseudo-64.mir
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tailcall-pseudo.mir
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tailcall-readnone.ll
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tailcall-returndup-void.ll
…
tailcall-ri64.ll
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tailcall-stackalign.ll
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tailcall-structret.ll
…
tailcall.ll
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tailcallbyval64.ll
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tailcallbyval.ll
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tailcallfp2.ll
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tailcallfp.ll
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tailcallpic1.ll
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tailcallpic2.ll
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tailcallpic3.ll
…
tailcallstack64.ll
…
taildup-crash.ll
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tailjmp_gotpcrel_relax_relocation.ll
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targetLoweringGeneric.ll
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tbm_patterns.ll
[X86] Add patterns with and_flag_nocf for BLSI and TBM instructions.
2019-07-10 22:44:32 +00:00
tbm-intrinsics-fast-isel-x86_64.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
tbm-intrinsics-fast-isel.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
tbm-intrinsics-x86_64.ll
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tbm-intrinsics.ll
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test_x86condbr_globaladdr.mir
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test-nofold.ll
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test-shrink-bug.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
test-shrink.ll
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test-vs-bittest.ll
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testb-je-fusion.ll
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testl-commute.ll
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this-return-64.ll
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throws-cfi-fp.ll
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throws-cfi-no-fp.ll
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tls-addr-non-leaf-function.ll
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tls-android-negative.ll
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tls-android.ll
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tls-local-dynamic.ll
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tls-models.ll
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tls-no-plt.ll
[X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled
2019-07-11 10:10:09 +00:00
tls-pic.ll
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tls-pie.ll
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tls-shrink-wrapping.ll
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tls-windows-itanium.ll
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tls.ll
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tlv-1.ll
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tlv-2.ll
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tlv-3.ll
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token_landingpad.ll
…
trap.ll
…
tree_way_unsigned_cmp.ll
[NFC] Added test from PR19758
2019-06-09 15:12:46 +00:00
trunc-and.ll
[DAGCombiner][x86] prevent infinite loop from truncate/extend transforms
2019-08-05 11:27:07 +00:00
trunc-ext-ld-st.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
trunc-store.ll
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trunc-subvector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
trunc-to-bool.ll
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TruncAssertSext.ll
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TruncAssertZext.ll
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twoaddr-coalesce-2.ll
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twoaddr-coalesce-3.ll
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twoaddr-coalesce.ll
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twoaddr-dbg-value.mir
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twoaddr-lea.ll
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twoaddr-pass-sink.ll
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twoaddr-sink-terminator.ll
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typeid-alias.ll
CodeGen: Don't follow aliases when extracting type info.
2019-08-02 17:43:45 +00:00
uadd_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
uadd_sat.ll
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uint64-to-float.ll
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uint_to_fp-2.ll
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uint_to_fp-3.ll
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uint_to_fp.ll
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umul_fix.ll
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umul-with-carry.ll
…
umul-with-overflow.ll
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umulo-64-legalisation-lowering.ll
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umulo-128-legalisation-lowering.ll
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unaligned-32-byte-memops.ll
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unaligned-load.ll
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unaligned-spill-folding.ll
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undef-eflags.mir
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undef-globals-bss.ll
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undef-label.ll
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undef-ops.ll
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unfold-masked-merge-scalar-constmask-innerouter.ll
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unfold-masked-merge-scalar-constmask-interleavedbits.ll
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unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
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unfold-masked-merge-scalar-constmask-lowhigh.ll
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unfold-masked-merge-scalar-variablemask.ll
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unfold-masked-merge-vector-variablemask-const.ll
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unfold-masked-merge-vector-variablemask.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
unknown-location.ll
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unreachable-loop-sinking.ll
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unreachable-mbb-undef-phi.mir
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unreachable-trap.ll
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unreachableblockelim.ll
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unused_stackslots.ll
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unwind-init.ll
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unwindraise.ll
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update-terminator-debugloc.ll
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update-terminator.mir
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urem-i8-constant.ll
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urem-power-of-two.ll
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urem-seteq-optsize.ll
[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)
2019-06-27 21:52:10 +00:00
urem-seteq-vec-nonsplat.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
urem-seteq-vec-splat.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
urem-seteq.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
use-add-flags.ll
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usub_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
usub_sat.ll
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utf8.ll
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utf16-cfstrings.ll
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uwtables.ll
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v2f32.ll
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v4f32-immediate.ll
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v4i32load-crash.ll
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v8i1-masks.ll
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vaargs.ll
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vaes-intrinsics-avx512-x86.ll
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vaes-intrinsics-avx512vl-x86.ll
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vaes-intrinsics-avx-x86.ll
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var-permute-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
var-permute-256.ll
[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))
2019-06-22 17:57:01 +00:00
var-permute-512.ll
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vararg_no_start.ll
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vararg_tailcall.ll
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vararg-callee-cleanup.ll
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variable-sized-darwin-bzero.ll
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variadic-node-pic.ll
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vastart-defs-eflags.ll
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vbinop-simplify-bug.ll
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vec3.ll
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vec_align_i256.ll
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vec_align.ll
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vec_anyext.ll
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vec_call.ll
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vec_cast2.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vec_cast3.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vec_cast.ll
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vec_cmp_sint-128.ll
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vec_cmp_uint-128.ll
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vec_compare-sse4.ll
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vec_compare.ll
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vec_ctbits.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_ext_inreg.ll
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vec_extract-avx.ll
[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)
2019-06-21 19:10:21 +00:00
vec_extract-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_extract-sse4.ll
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vec_extract.ll
[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices
2019-07-05 10:34:53 +00:00
vec_fabs.ll
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vec_floor.ll
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vec_fneg.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
vec_fp_to_int.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_fpext.ll
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vec_fptrunc.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
vec_i64.ll
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vec_ins_extract-1.ll
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vec_ins_extract.ll
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vec_insert-2.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vec_insert-3.ll
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vec_insert-4.ll
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vec_insert-5.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_insert-7.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_insert-8.ll
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vec_insert-9.ll
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vec_insert-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_int_to_fp.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_loadsingles.ll
…
vec_logical.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
vec_minmax_match.ll
…
vec_minmax_sint.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
vec_minmax_uint.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
vec_partial.ll
…
vec_reassociate.ll
…
vec_return.ll
…
vec_round.ll
…
vec_saddo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_sdiv_to_shift.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
…
vec_set.ll
…
vec_setcc-2.ll
…
vec_setcc.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift4.ll
…
vec_shift5.ll
…
vec_shift6.ll
…
vec_shift7.ll
…
vec_shift.ll
…
vec_shuf-insert.ll
…
vec_smulo.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask
2019-08-08 15:54:20 +00:00
vec_split.ll
…
vec_ss_load_fold.ll
…
vec_ssubo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_trunc_sext.ll
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vec_uaddo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_udiv_to_shift.ll
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vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
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vec_umulo.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask
2019-08-08 15:54:20 +00:00
vec_unsafe-fp-math.ll
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vec_usubo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_zero_cse.ll
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vec_zero-2.ll
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vec_zero.ll
…
vec-copysign-avx512.ll
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vec-copysign.ll
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vec-libcalls.ll
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vec-loadsingles-alignment.ll
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vec-trunc-store.ll
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vecloadextract.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
vector_splat-const-shift-of-constmasked.ll
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vector-bitreverse.ll
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vector-blend.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-compare-all_of.ll
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vector-compare-any_of.ll
…
vector-compare-combines.ll
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vector-compare-results.ll
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vector-compare-simplify.ll
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vector-constrained-fp-intrinsics-fma.ll
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vector-constrained-fp-intrinsics.ll
[Strict FP] Allow custom operation actions
2019-08-06 10:43:13 +00:00
vector-ext-logic.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-extend-inreg.ll
[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.
2019-06-21 17:24:21 +00:00
vector-fshl-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-512.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
vector-fshl-rot-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-rot-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-rot-512.ll
[SelectionDAG] Check for any recursion depth greater than or equal to limit instead of just equal the limit.
2019-07-27 12:48:46 +00:00
vector-fshr-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-512.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
vector-fshr-rot-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-rot-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-rot-512.ll
[SelectionDAG] Check for any recursion depth greater than or equal to limit instead of just equal the limit.
2019-07-27 12:48:46 +00:00
vector-gep.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-half-conversions.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-idiv-sdiv-128.ll
…
vector-idiv-sdiv-256.ll
…
vector-idiv-sdiv-512.ll
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vector-idiv-udiv-128.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - return UNDEF for undemanded ops
2019-08-06 14:30:42 +00:00
vector-idiv-udiv-256.ll
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vector-idiv-udiv-512.ll
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vector-idiv-v2i32.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-idiv.ll
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vector-interleave.ll
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vector-intrinsics.ll
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vector-lzcnt-128.ll
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vector-lzcnt-256.ll
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vector-lzcnt-512.ll
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vector-lzcnt-sub128.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-merge-store-fp-constants.ll
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vector-mul.ll
[X86] In decomposeMulByConstant, legalize the VT before querying whether the multiply is legal
2019-08-01 18:49:07 +00:00
vector-narrow-binop.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-partial-undef.ll
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vector-pcmp.ll
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vector-popcnt-128.ll
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vector-popcnt-256.ll
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vector-popcnt-512.ll
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vector-reduce-add.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-and-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-and.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-fadd-fast.ll
[X86] Regenerate fast fadd reduction tests. NFCI
2019-06-24 16:25:30 +00:00
vector-reduce-fadd.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-fmax-nnan.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmax.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmin-nnan.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmin.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmul-fast.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-fmul.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-mul.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT
2019-08-08 10:37:03 +00:00
vector-reduce-or-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-or.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-smax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-smin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-umax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-umin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-xor-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-xor.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-rem.ll
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vector-rotate-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-rotate-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-rotate-512.ll
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vector-sext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-ashr-128.ll
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vector-shift-ashr-256.ll
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vector-shift-ashr-512.ll
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vector-shift-ashr-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-by-select-loop.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-lshr-128.ll
[CodeGenPrepare][x86] shift both sides of a vector select when profitable
2019-06-16 15:29:03 +00:00
vector-shift-lshr-256.ll
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vector-shift-lshr-512.ll
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vector-shift-lshr-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-shl-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-shift-shl-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-shift-shl-512.ll
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vector-shift-shl-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-128-unpck.ll
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vector-shuffle-128-v2.ll
[X86] In lowerVectorShuffle, instead of creating a new node to canonicalize the shuffle mask by commuting, just commute the mask and swap V1/V2.
2019-07-23 18:46:15 +00:00
vector-shuffle-128-v4.ll
[X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it
2019-07-09 19:55:28 +00:00
vector-shuffle-128-v8.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vector-shuffle-128-v16.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-256-v4.ll
[X86][AVX] Add PR34359 shuffle test case.
2019-07-12 17:42:32 +00:00
vector-shuffle-256-v8.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vector-shuffle-256-v16.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
vector-shuffle-256-v32.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
vector-shuffle-512-v8.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
vector-shuffle-512-v16.ll
[X86][AVX] combineX86ShufflesRecursively - peek through extract_subvector
2019-07-03 15:46:08 +00:00
vector-shuffle-512-v32.ll
[X86][AVX] SimplifyDemandedVectorElts - combine PERMPD(x) -> EXTRACTF128(X)
2019-06-27 11:16:03 +00:00
vector-shuffle-512-v64.ll
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vector-shuffle-avx512.ll
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vector-shuffle-combining-avx2.ll
[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.
2019-06-21 17:24:21 +00:00
vector-shuffle-combining-avx512bw.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx512bwvl.ll
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vector-shuffle-combining-avx512vbmi.ll
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vector-shuffle-combining-avx.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining-sse4a.ll
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vector-shuffle-combining-sse41.ll
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vector-shuffle-combining-ssse3.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vector-shuffle-combining-xop.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-masked.ll
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vector-shuffle-mmx.ll
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vector-shuffle-sse1.ll
[X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only.
2019-07-15 02:02:31 +00:00
vector-shuffle-sse4a.ll
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vector-shuffle-sse41.ll
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vector-shuffle-v1.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
vector-shuffle-v48.ll
[X86][SSE] Regenerate v48 shuffle test on a variety of targets
2019-06-27 11:22:23 +00:00
vector-shuffle-variable-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vector-shuffle-variable-256.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vector-sqrt.ll
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vector-trunc-math.ll
[X86] When using AND+PACKUS in lowerV16I8Shuffle, generate the build vector directly in v16i8 with the correct 0x00 or 0xFF elements rather than using another VT and bitcasting it.
2019-07-22 19:58:49 +00:00
vector-trunc-packus.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-trunc-ssat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-trunc-usat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-trunc.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-truncate-combine.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-tzcnt-128.ll
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vector-tzcnt-256.ll
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vector-tzcnt-512.ll
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vector-unsigned-cmp.ll
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vector-variable-idx2.ll
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vector-variable-idx.ll
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vector-width-store-merge.ll
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vector-zext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-zmov.ll
[X86] Add a DAG combine to turn vzmovl+load into vzload if the load isn't volatile. Remove isel patterns for vzmovl+load
2019-06-25 17:08:26 +00:00
vector.ll
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vectorcall.ll
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version_directive.ll
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vfcmp.ll
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viabs.ll
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virtreg-physreg-def-regallocfast.mir
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virtual-registers-cleared-in-machine-functions-liveins.ll
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visibility2.ll
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visibility.ll
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vmaskmov-offset.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
vmovq.ll
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volatile-memstores-nooverlapping-load-stores.ll
Fixing @llvm.memcpy not honoring volatile.
2019-07-09 09:53:36 +00:00
volatile.ll
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vortex-bug.ll
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vp2intersect_multiple_pairs.ll
[X86] Regenerate vp2intersect tests
2019-07-31 12:17:10 +00:00
vpshufbitqbm-intrinsics-upgrade.ll
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vpshufbitqbm-intrinsics.ll
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vsel-cmp-load.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vselect-2.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vselect-avx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vselect-constants.ll
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vselect-minmax.ll
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vselect-packss.ll
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vselect-pcmp.ll
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vselect-zero.ll
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vselect.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vshift_scalar.ll
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vshift_split2.ll
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vshift_split.ll
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vshift-1.ll
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vshift-2.ll
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vshift-3.ll
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vshift-4.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vshift-5.ll
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vshift-6.ll
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vsplit-and.ll
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vzero-excess.ll
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waitpkg-intrinsics.ll
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warn-stack.ll
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wbinvd-intrinsic.ll
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wbnoinvd-intrinsic.ll
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weak_def_can_be_hidden.ll
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weak-undef.ll
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weak.ll
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webkit-jscc.ll
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wide-fma-contraction.ll
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wide-integer-cmp.ll
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wide-integer-fold.ll
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widen_arith-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_arith-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_arith-3.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_arith-4.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
widen_arith-5.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
widen_arith-6.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
widen_bitops-0.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_bitops-1.ll
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widen_cast-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-3.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-4.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
widen_cast-5.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-6.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_compare-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-3.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-4.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conversions.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
widen_extract-1.ll
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widen_load-0.ll
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widen_load-1.ll
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widen_load-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_load-3.ll
[x86] avoid vector load narrowing with extracted store uses (PR42305)
2019-06-19 18:13:47 +00:00
widen_mul.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
widen_shuffle-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
WidenArith.ll
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widened-broadcast.ll
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win32_sret.ll
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win32-bool.ll
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win32-eh-available-externally.ll
IR: print value numbers for unnamed function arguments
2019-08-03 14:28:34 +00:00
win32-eh-states.ll
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win32-eh.ll
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win32-pic-jumptable.ll
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win32-preemption.ll
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win32-seh-catchpad-realign.ll
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win32-seh-catchpad.ll
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win32-seh-nested-finally.ll
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win32-spill-xmm.ll
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win32-ssp.ll
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win64_alloca_dynalloca.ll
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win64_call_epi.ll
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win64_eh_leaf2.ll
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win64_eh_leaf.ll
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win64_eh.ll
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win64_frame.ll
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win64_nonvol.ll
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win64_params.ll
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win64_sibcall.ll
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win64_vararg.ll
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win64-bool.ll
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win64-byval.ll
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win64-funclet-savexmm.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
win64-jumptable.ll
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win64-long-double.ll
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win64-nosse-csrs.ll
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win_chkstk.ll
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win_coreclr_chkstk_liveins.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
win_coreclr_chkstk.ll
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win_cst_pool.ll
Standardize on MSVC behavior for triples with no environment
2019-07-08 21:05:20 +00:00
win-alloca-expander.ll
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win-catchpad-csrs.ll
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win-catchpad-nested-cxx.ll
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win-catchpad-nested.ll
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win-catchpad-varargs.ll
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win-catchpad.ll
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win-cleanuppad.ll
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win-funclet-cfi.ll
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win-mixed-ehpersonality.ll
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win-smallparams.ll
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windows-itanium-alloca.ll
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wineh-coreclr.ll
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wineh-exceptionpointer.ll
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wineh-no-ehpads.ll
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x32-cet-intrinsics.ll
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x32-function_pointer-1.ll
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x32-function_pointer-2.ll
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x32-function_pointer-3.ll
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x32-indirectbr.ll
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x32-landingpad.ll
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x32-lea-1.ll
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x32-movtopush64.ll
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x32-va_start.ll
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x64-cet-intrinsics.ll
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x86_64-mul-by-const.ll
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x86-16.ll
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x86-32-intrcc.ll
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x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll
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x86-64-bittest-logic.ll
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x86-64-call.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
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x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
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x86-64-double-shifts-var.ll
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x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
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x86-64-gv-offset.ll
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x86-64-intrcc-nosse.ll
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x86-64-intrcc.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll
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x86-big-ret.ll
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x86-cmov-converter.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
x86-interleaved-check.ll
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x86-interrupt_cc.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_caller_saved_registers-preserve.ll
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x86-no_caller_saved_registers.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
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x87.ll
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xaluo.ll
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xchg-nofold.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
xmm-r64.ll
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xmulo.ll
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xop-ifma.ll
Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."
2019-06-25 01:32:42 +00:00
xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
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xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
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xop-pcmov.ll
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xor-combine-debugloc.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
xor-icmp.ll
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xor-select-i1-combine.ll
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xor.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT
2019-08-08 10:37:03 +00:00
xray-attribute-instrumentation.ll
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xray-custom-log.ll
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xray-empty-firstmbb.mir
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xray-empty-function.mir
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xray-log-args.ll
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xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
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xray-section-group.ll
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xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xray-typed-event-log.ll
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xtest.ll
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zero-remat.ll
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zext-demanded.ll
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zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-logicop-shift-load.ll
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zext-sext.ll
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zext-shl.ll
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zext-trunc.ll
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zlib-longest-match.ll
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