Benjamin Maxwell c165b0553a [TargetLowering] Teach DemandedBits about VSCALE ...

This allows DemandedBits to see the result of VSCALE will be at most
VScaleMax * some compile-time constant. This relies on the vscale_range()
attribute being present on the function, with a max set. (This is done by
default when clang is targeting AArch64+SVE).

Using this various redundant operations (zexts, sexts, ands, ors, etc)
can be eliminated.

Differential Revision: https://reviews.llvm.org/D138508

2022-12-14 15:49:08 +00:00

..

CMakeLists.txt

…

DAGCombiner.cpp

[CodeGen] llvm::Optional => std::optional

2022-12-13 09:06:36 +00:00

FastISel.cpp

Remove unused #include "llvm/ADT/Optional.h"

2022-12-05 06:31:11 +00:00

FunctionLoweringInfo.cpp

WebAssembly: Move exception handling code together

2022-11-02 16:05:34 -07:00

InstrEmitter.cpp

[AArch64][SME] Add support for arm_locally_streaming functions.

2022-10-14 13:47:53 +00:00

InstrEmitter.h

…

LegalizeDAG.cpp

[AMDGPU] Add bf16 storage support

2022-12-13 10:34:26 -05:00

LegalizeFloatTypes.cpp

[SelectionDAG] Rewrite bfloat16 softening to use the "half promotion" path

2022-09-06 11:54:34 +02:00

LegalizeIntegerTypes.cpp

[AMDGPU] Add bf16 storage support

2022-12-13 10:34:26 -05:00

LegalizeTypes.cpp

[X86] Allow no X87 on 32-bit

2022-11-22 10:47:47 +08:00

LegalizeTypes.h

[AMDGPU] Add bf16 storage support

2022-12-13 10:34:26 -05:00

LegalizeTypesGeneric.cpp

[LegalizeTypes] Use getVectorElementCount to avoid crash of scalable vector.

2022-09-28 17:31:29 +08:00

LegalizeVectorOps.cpp

[VP][RISCV] Add vp.ctpop and RISC-V support.

2022-12-14 09:47:44 +08:00

LegalizeVectorTypes.cpp

[VP][RISCV] Add vp.ctpop and RISC-V support.

2022-12-14 09:47:44 +08:00

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

[CodeGen] Qualify auto variables in for loops (NFC)

2022-07-17 01:33:28 -07:00

ScheduleDAGRRList.cpp

[NFC] Add checks for potential null returns

2022-12-13 22:30:31 +08:00

ScheduleDAGSDNodes.cpp

[AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNode

2022-09-15 22:03:56 +02:00

ScheduleDAGSDNodes.h

…

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

…

SelectionDAG.cpp

[CodeGen] llvm::Optional => std::optional

2022-12-13 09:06:36 +00:00

SelectionDAGAddressAnalysis.cpp

[CodeGen] llvm::Optional => std::optional

2022-12-13 09:06:36 +00:00

SelectionDAGBuilder.cpp

Don't include None.h (NFC)

2022-12-10 11:24:26 -08:00

SelectionDAGBuilder.h

[Assignment Tracking][Analysis] Add analysis pass

2022-12-09 16:17:37 +00:00

SelectionDAGDumper.cpp

[SDAG] Print divergence in SDNode::dump

2022-09-16 11:43:34 -07:00

SelectionDAGISel.cpp

[Assignment Tracking][Analysis] Add analysis pass

2022-12-09 16:17:37 +00:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

…

StatepointLowering.cpp

[CodeGen] llvm::Optional => std::optional

2022-12-13 09:06:36 +00:00

StatepointLowering.h

…

TargetLowering.cpp

[TargetLowering] Teach DemandedBits about VSCALE

2022-12-14 15:49:08 +00:00