18ed279a3a
Tablegen definitions for subtarget features and cpp predicate functions to access the features. New Sub-TargetProcessors and common latencies. Simple changes to MIR codegen tests which pass on gfx11 because they have the same output as previous subtargets or operate on pseudo instructions which are reused from previous subtargets. Contributors: Jay Foad <jay.foad@amd.com> Petar Avramovic <Petar.Avramovic@amd.com> Patch 4/N for upstreaming of AMDGPU gfx11 architecture Depends on D124538 Reviewed By: Petar.Avramovic, foad Differential Revision: https://reviews.llvm.org/D125261
404 lines
14 KiB
YAML
404 lines
14 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s
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---
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name: copy
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr2_sgpr3
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; WAVE64-LABEL: name: copy
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE64: [[COPY1:%[0-9]+]]:vreg_64 = COPY [[COPY]]
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; WAVE64: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; WAVE64: FLAT_STORE_DWORD [[COPY1]], [[DEF]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
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; WAVE32-LABEL: name: copy
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE32: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; WAVE32: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; WAVE32: GLOBAL_STORE_DWORD_SADDR [[V_MOV_B32_e32_]], [[DEF]], [[COPY]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
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%0:sgpr(p1) = COPY $sgpr2_sgpr3
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%1:vgpr(p1) = COPY %0
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%2:vgpr(s32) = G_IMPLICIT_DEF
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G_STORE %2, %1 :: (store (s32), addrspace 1)
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...
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---
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name: copy_vcc_bank_sgpr_bank
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
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; WAVE64-LABEL: name: copy_vcc_bank_sgpr_bank
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; WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE64: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def $scc
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; WAVE64: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE64: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
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; WAVE32-LABEL: name: copy_vcc_bank_sgpr_bank
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; WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE32: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def $scc
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; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE32: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = COPY $vgpr2
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%2:vgpr(s32) = COPY $vgpr3
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%3:sgpr(s1) = COPY $scc
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%4:vcc(s1) = COPY %3
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%5:vgpr(s32) = G_SELECT %4, %1, %2
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G_STORE %5, %0 :: (store (s32), addrspace 1)
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...
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---
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name: copy_vcc_bank_sgpr_bank_2_uses
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
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; WAVE64-LABEL: name: copy_vcc_bank_sgpr_bank_2_uses
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; WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE64: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def $scc
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; WAVE64: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE64: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def $scc
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; WAVE64: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_1]], implicit $exec
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; WAVE64: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_CNDMASK_B32_e64_]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_1]], implicit $exec
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; WAVE64: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_1]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
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; WAVE32-LABEL: name: copy_vcc_bank_sgpr_bank_2_uses
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; WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE32: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE32: [[COPY4:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[COPY3]]
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; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY4]], implicit $exec
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY3]], implicit-def $scc
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; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE32: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[V_CNDMASK_B32_e64_]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE32: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_1]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = COPY $vgpr2
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%2:vgpr(s32) = COPY $vgpr3
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%3:sgpr(s1) = COPY $scc
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%4:vcc(s1) = COPY %3
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%5:vgpr(s32) = G_SELECT %4, %1, %2
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%6:vcc(s1) = COPY %3
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%7:vgpr(s32) = G_SELECT %6, %1, %5
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G_STORE %7, %0 :: (store (s32), addrspace 1)
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...
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---
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name: copy_vcc_bank_scc_physreg
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $scc
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; WAVE64-LABEL: name: copy_vcc_bank_scc_physreg
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; WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE64: [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY $scc
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; WAVE64: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY3]], implicit $exec
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; WAVE64: FLAT_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
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; WAVE32-LABEL: name: copy_vcc_bank_scc_physreg
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; WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE32: [[COPY3:%[0-9]+]]:sreg_32_xm0_xexec = COPY $scc
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; WAVE32: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[COPY3]], implicit $exec
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; WAVE32: GLOBAL_STORE_DWORD [[COPY]], [[V_CNDMASK_B32_e64_]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
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%0:vgpr(p1) = COPY $vgpr0_vgpr1
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%1:vgpr(s32) = COPY $vgpr2
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%2:vgpr(s32) = COPY $vgpr3
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%3:vcc(s1) = COPY $scc
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%5:vgpr(s32) = G_SELECT %3, %1, %2
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G_STORE %5, %0 :: (store (s32), addrspace 1)
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...
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---
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name: copy_sgpr_no_type
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: copy_sgpr_no_type
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; WAVE64: S_ENDPGM 0, implicit [[COPY]]
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; WAVE32-LABEL: name: copy_sgpr_no_type
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; WAVE32: S_ENDPGM 0, implicit [[COPY]]
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%0:sreg_32_xm0 = COPY $sgpr0
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%1:sreg_32_xm0 = COPY %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: copy_vgpr_no_type
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; WAVE64-LABEL: name: copy_vgpr_no_type
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; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64: S_ENDPGM 0, implicit [[COPY]]
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; WAVE32-LABEL: name: copy_vgpr_no_type
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; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE32: S_ENDPGM 0, implicit [[COPY]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = COPY %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: copy_maybe_vcc
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; WAVE64-LABEL: name: copy_maybe_vcc
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
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; WAVE64: S_ENDPGM 0, implicit [[COPY]]
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; WAVE32-LABEL: name: copy_maybe_vcc
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
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; WAVE32: S_ENDPGM 0, implicit [[COPY]]
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%0:sreg_64_xexec = COPY $sgpr0_sgpr1
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%1:sreg_64_xexec = COPY %0
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S_ENDPGM 0, implicit %1
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...
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# FIXME: This is malformed. There should never be a trunc to vcc.
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---
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name: copy_s1_vcc_to_vcc
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; WAVE64-LABEL: name: copy_s1_vcc_to_vcc
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]]
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; WAVE64: S_ENDPGM 0, implicit [[COPY1]]
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; WAVE32-LABEL: name: copy_s1_vcc_to_vcc
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32_xm0_xexec = COPY [[COPY]]
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; WAVE32: S_ENDPGM 0, implicit [[COPY1]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vcc(s1) = G_TRUNC %0
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%2:vcc(s1) = COPY %1
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S_ENDPGM 0, implicit %2
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...
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---
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name: copy_s64_to_vcc
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; WAVE64-LABEL: name: copy_s64_to_vcc
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE64: $vcc = COPY [[COPY]]
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; WAVE64: S_ENDPGM 0, implicit $vcc
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; WAVE32-LABEL: name: copy_s64_to_vcc
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE32: $vcc = COPY [[COPY]]
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; WAVE32: S_ENDPGM 0, implicit $vcc_lo
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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$vcc = COPY %0
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S_ENDPGM 0, implicit $vcc
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...
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---
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name: copy_s32_to_vcc_lo
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: copy_s32_to_vcc_lo
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: $vcc_lo = COPY [[COPY]]
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; WAVE64: S_ENDPGM 0, implicit $vcc
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; WAVE32-LABEL: name: copy_s32_to_vcc_lo
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: $vcc_lo = COPY [[COPY]]
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; WAVE32: S_ENDPGM 0, implicit $vcc_lo
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%0:sgpr(s32) = COPY $sgpr0
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$vcc_lo = COPY %0
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S_ENDPGM 0, implicit $vcc
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...
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---
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name: copy_vcc_to_s64
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vcc
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; WAVE64-LABEL: name: copy_vcc_to_s64
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $vcc
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; WAVE64: S_ENDPGM 0, implicit [[COPY]]
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; WAVE32-LABEL: name: copy_vcc_to_s64
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $vcc
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; WAVE32: S_ENDPGM 0, implicit [[COPY]]
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%0:sgpr(s64) = COPY $vcc
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S_ENDPGM 0, implicit %0
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...
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---
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name: copy_vcc_lo_to_s32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vcc
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; WAVE64-LABEL: name: copy_vcc_lo_to_s32
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $vcc_lo
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; WAVE64: S_ENDPGM 0, implicit [[COPY]]
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; WAVE32-LABEL: name: copy_vcc_lo_to_s32
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $vcc_lo
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; WAVE32: S_ENDPGM 0, implicit [[COPY]]
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%0:sgpr(s32) = COPY $vcc_lo
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S_ENDPGM 0, implicit %0
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...
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---
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name: copy_s1_to_vcc
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; WAVE64-LABEL: name: copy_s1_to_vcc
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; WAVE64: liveins: $sgpr0_sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY1]], implicit-def $scc
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; WAVE64: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
|
|
; WAVE64: S_ENDPGM 0, implicit [[V_CMP_NE_U32_e64_]]
|
|
; WAVE32-LABEL: name: copy_s1_to_vcc
|
|
; WAVE32: liveins: $sgpr0_sgpr1
|
|
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
|
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
|
|
; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY1]], implicit-def $scc
|
|
; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
|
|
; WAVE32: S_ENDPGM 0, implicit [[V_CMP_NE_U32_e64_]]
|
|
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
|
%1:sgpr(s1) = G_TRUNC %0(s64)
|
|
%2:vcc(s1) = COPY %1(s1)
|
|
S_ENDPGM 0, implicit %2
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: copy_s1_false_to_vcc
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; WAVE64-LABEL: name: copy_s1_false_to_vcc
|
|
; WAVE64: liveins: $sgpr0
|
|
; WAVE64: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
|
|
; WAVE64: S_ENDPGM 0, implicit [[S_MOV_B64_]]
|
|
; WAVE32-LABEL: name: copy_s1_false_to_vcc
|
|
; WAVE32: liveins: $sgpr0
|
|
; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
|
|
; WAVE32: S_ENDPGM 0, implicit [[S_MOV_B32_]]
|
|
%0:sgpr(s1) = G_CONSTANT i1 false
|
|
%1:vcc(s1) = COPY %0(s1)
|
|
S_ENDPGM 0, implicit %1
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: copy_s1_true_to_vcc
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; WAVE64-LABEL: name: copy_s1_true_to_vcc
|
|
; WAVE64: liveins: $sgpr0
|
|
; WAVE64: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 -1
|
|
; WAVE64: S_ENDPGM 0, implicit [[S_MOV_B64_]]
|
|
; WAVE32-LABEL: name: copy_s1_true_to_vcc
|
|
; WAVE32: liveins: $sgpr0
|
|
; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
|
|
; WAVE32: S_ENDPGM 0, implicit [[S_MOV_B32_]]
|
|
%0:sgpr(s1) = G_CONSTANT i1 true
|
|
%1:vcc(s1) = COPY %0(s1)
|
|
S_ENDPGM 0, implicit %1
|
|
|
|
...
|