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clang-p2996/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
Joe Nash 18ed279a3a [AMDGPU] gfx11 subtarget features & early tests 
Tablegen definitions for subtarget features and cpp predicate functions to
access the features.
New Sub-TargetProcessors and common latencies.
Simple changes to MIR codegen tests which pass on gfx11 because they have the
same output as previous subtargets or operate on pseudo instructions which
are reused from previous subtargets.

Contributors:
Jay Foad <jay.foad@amd.com>
Petar Avramovic <Petar.Avramovic@amd.com>

Patch 4/N for upstreaming of AMDGPU gfx11 architecture

Depends on D124538

Reviewed By: Petar.Avramovic, foad

Differential Revision: https://reviews.llvm.org/D125261
2022-05-11 10:31:49 -04:00

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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN -DVCCRC=sreg_64_xexec %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN -DVCCRC=sreg_64_xexec %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN -DVCCRC=sreg_32_xm0_xexec %s
# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN -DVCCRC=sreg_32_xm0_xexec %s
---
name: icmp_s32_s_mix
legalized: true
regBankSelected: true
# GCN: name: icmp_s32_s_mix
# GCN: [[SGPR0:%[0-9]+]]:sreg_32 = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sreg_32 = COPY $sgpr1
# GCN: [[SGPR2:%[0-9]+]]:sreg_32 = COPY $sgpr2
# GCN: [[SGPR3:%[0-9]+]]:sreg_32 = COPY $sgpr3
# GCN: [[SGPR4:%[0-9]+]]:sreg_32 = COPY $sgpr4
# GCN: [[SGPR5:%[0-9]+]]:sreg_32 = COPY $sgpr5
# GCN: [[SGPR6:%[0-9]+]]:sreg_32 = COPY $sgpr6
# GCN: [[SGPR7:%[0-9]+]]:sreg_32 = COPY $sgpr7
# GCN: S_CMP_LG_U32 [[SGPR0]], [[SGPR1]], implicit-def $scc
# GCN-NEXT: [[COND0:%[0-9]+]]:sreg_32 = COPY $scc
# GCN: S_CMP_LG_U32 [[SGPR4]], [[SGPR5]], implicit-def $scc
# GCN-NEXT: [[COND1:%[0-9]+]]:sreg_32 = COPY $scc
# GCN: $scc = COPY [[COND0]]
# GCN-NEXT: S_CSELECT_B32 [[SGPR6]], [[SGPR7]], implicit $scc
# GCN: $scc = COPY [[COND1]]
# GCN-NEXT: S_CSELECT_B32 [[SGPR2]], [[SGPR3]], implicit $scc
body: |
bb.0:
liveins: $vgpr0_vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:sgpr(s32) = COPY $sgpr0
%2:sgpr(s32) = COPY $sgpr1
%3:sgpr(s32) = COPY $sgpr2
%4:sgpr(s32) = COPY $sgpr3
%5:sgpr(s32) = COPY $sgpr4
%6:sgpr(s32) = COPY $sgpr5
%7:sgpr(s32) = COPY $sgpr6
%8:sgpr(s32) = COPY $sgpr7
%9:sgpr(s32) = G_ICMP intpred(ne), %1, %2
%10:sgpr(s32) = G_ICMP intpred(ne), %5, %6
%11:sgpr(s32) = G_SELECT %9, %7, %8
%12:sgpr(s32) = G_SELECT %10, %3, %4
%13:vgpr(s32) = COPY %11
G_STORE %13, %0 :: (volatile store (s32), addrspace 1)
%14:vgpr(s32) = COPY %12
G_STORE %14, %0 :: (volatile store (s32), addrspace 1)
...
---
name: icmp_s32_salu
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_salu
# GCN: S_CMP_LG_U32
# GCN: S_CMP_EQ_U32
# GCN: S_CMP_GT_I32
# GCN: S_CMP_GE_I32
# GCN: S_CMP_LT_I32
# GCN: S_CMP_LE_I32
# GCN: S_CMP_GT_U32
# GCN: S_CMP_GE_U32
# GCN: S_CMP_LT_U32
# GCN: S_CMP_LE_U32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:sgpr(s32) = COPY $sgpr0
%2:sgpr(s32) = COPY $sgpr1
%3:sgpr(s32) = COPY $sgpr2
%4:sgpr(s32) = COPY $sgpr3
%5:sgpr(s32) = G_ICMP intpred(ne), %1, %2
%6:sgpr(s32) = G_ICMP intpred(eq), %1, %2
%7:sgpr(s32) = G_ICMP intpred(sgt), %1, %2
%8:sgpr(s32) = G_ICMP intpred(sge), %1, %2
%9:sgpr(s32) = G_ICMP intpred(slt), %1, %2
%10:sgpr(s32) = G_ICMP intpred(sle), %1, %2
%11:sgpr(s32) = G_ICMP intpred(ugt), %1, %2
%12:sgpr(s32) = G_ICMP intpred(uge), %1, %2
%13:sgpr(s32) = G_ICMP intpred(ult), %1, %2
%14:sgpr(s32) = G_ICMP intpred(ule), %1, %2
%15:sgpr(s32) = G_SELECT %5, %3, %4
%16:sgpr(s32) = G_SELECT %6, %3, %4
%17:sgpr(s32) = G_SELECT %7, %3, %4
%18:sgpr(s32) = G_SELECT %8, %3, %4
%19:sgpr(s32) = G_SELECT %9, %3, %4
%20:sgpr(s32) = G_SELECT %10, %3, %4
%21:sgpr(s32) = G_SELECT %11, %3, %4
%22:sgpr(s32) = G_SELECT %12, %3, %4
%23:sgpr(s32) = G_SELECT %13, %3, %4
%24:sgpr(s32) = G_SELECT %14, %3, %4
%25:vgpr(s32) = COPY %15
G_STORE %25, %0 :: (volatile store (s32), addrspace 1)
%26:vgpr(s32) = COPY %16
G_STORE %26, %0 :: (volatile store (s32), addrspace 1)
%27:vgpr(s32) = COPY %17
G_STORE %27, %0 :: (volatile store (s32), addrspace 1)
%28:vgpr(s32) = COPY %18
G_STORE %28, %0 :: (volatile store (s32), addrspace 1)
%29:vgpr(s32) = COPY %19
G_STORE %29, %0 :: (volatile store (s32), addrspace 1)
%30:vgpr(s32) = COPY %20
G_STORE %30, %0 :: (volatile store (s32), addrspace 1)
%31:vgpr(s32) = COPY %21
G_STORE %31, %0 :: (volatile store (s32), addrspace 1)
%32:vgpr(s32) = COPY %22
G_STORE %32, %0 :: (volatile store (s32), addrspace 1)
%33:vgpr(s32) = COPY %23
G_STORE %33, %0 :: (volatile store (s32), addrspace 1)
%34:vgpr(s32) = COPY %24
G_STORE %34, %0 :: (volatile store (s32), addrspace 1)
...
---
name: icmp_s32_v_mix
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_v_mix
# GCN: [[VGPR2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
# GCN: [[VGPR3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
# GCN: [[VGPR4:%[0-9]+]]:vgpr_32 = COPY $vgpr4
# GCN: [[VGPR5:%[0-9]+]]:vgpr_32 = COPY $vgpr5
# GCN: [[VGPR6:%[0-9]+]]:vgpr_32 = COPY $vgpr6
# GCN: [[VGPR7:%[0-9]+]]:vgpr_32 = COPY $vgpr7
# GCN: [[VGPR8:%[0-9]+]]:vgpr_32 = COPY $vgpr8
# GCN: [[VGPR9:%[0-9]+]]:vgpr_32 = COPY $vgpr9
# GCN: [[COND0:%[0-9]+]]:[[VCCRC]] = V_CMP_NE_U32_e64 [[VGPR2]], [[VGPR3]]
# GCN: [[COND1:%[0-9]+]]:[[VCCRC]] = V_CMP_NE_U32_e64 [[VGPR6]], [[VGPR7]]
# GCN: V_CNDMASK_B32_e64 0, [[VGPR9]], 0, [[VGPR8]], [[COND0]]
# GCN: V_CNDMASK_B32_e64 0, [[VGPR5]], 0, [[VGPR4]], [[COND1]]
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:vgpr(s32) = COPY $vgpr5
%5:vgpr(s32) = COPY $vgpr6
%6:vgpr(s32) = COPY $vgpr7
%7:vgpr(s32) = COPY $vgpr8
%8:vgpr(s32) = COPY $vgpr9
%9:vcc(s1) = G_ICMP intpred(ne), %1, %2
%10:vcc(s1) = G_ICMP intpred(ne), %5, %6
%11:vgpr(s32) = G_SELECT %9, %7, %8
%12:vgpr(s32) = G_SELECT %10, %3, %4
G_STORE %11, %0 :: (volatile store (s32), addrspace 1)
G_STORE %12, %0 :: (volatile store (s32), addrspace 1)
...
---
name: icmp_s32_valu
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_valu
# GCN: V_CMP_NE_U32_e64
# GCN: V_CMP_EQ_U32_e64
# GCN: V_CMP_GT_I32_e64
# GCN: V_CMP_GE_I32_e64
# GCN: V_CMP_LT_I32_e64
# GCN: V_CMP_LE_I32_e64
# GCN: V_CMP_GT_U32_e64
# GCN: V_CMP_GE_U32_e64
# GCN: V_CMP_LT_U32_e64
# GCN: V_CMP_LE_U32_e64
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:vgpr(s32) = COPY $vgpr5
%5:vcc(s1) = G_ICMP intpred(ne), %1, %2
%6:vcc(s1) = G_ICMP intpred(eq), %1, %2
%7:vcc(s1) = G_ICMP intpred(sgt), %1, %2
%8:vcc(s1) = G_ICMP intpred(sge), %1, %2
%9:vcc(s1) = G_ICMP intpred(slt), %1, %2
%10:vcc(s1) = G_ICMP intpred(sle), %1, %2
%11:vcc(s1) = G_ICMP intpred(ugt), %1, %2
%12:vcc(s1) = G_ICMP intpred(uge), %1, %2
%13:vcc(s1) = G_ICMP intpred(ult), %1, %2
%14:vcc(s1) = G_ICMP intpred(ule), %1, %2
%15:vgpr(s32) = G_SELECT %5, %3, %4
%16:vgpr(s32) = G_SELECT %6, %3, %4
%17:vgpr(s32) = G_SELECT %7, %3, %4
%18:vgpr(s32) = G_SELECT %8, %3, %4
%19:vgpr(s32) = G_SELECT %9, %3, %4
%20:vgpr(s32) = G_SELECT %10, %3, %4
%21:vgpr(s32) = G_SELECT %11, %3, %4
%22:vgpr(s32) = G_SELECT %12, %3, %4
%23:vgpr(s32) = G_SELECT %13, %3, %4
%24:vgpr(s32) = G_SELECT %14, %3, %4
G_STORE %15, %0 :: (volatile store (s32), addrspace 1)
G_STORE %16, %0 :: (volatile store (s32), addrspace 1)
G_STORE %17, %0 :: (volatile store (s32), addrspace 1)
G_STORE %18, %0 :: (volatile store (s32), addrspace 1)
G_STORE %19, %0 :: (volatile store (s32), addrspace 1)
G_STORE %20, %0 :: (volatile store (s32), addrspace 1)
G_STORE %21, %0 :: (volatile store (s32), addrspace 1)
G_STORE %22, %0 :: (volatile store (s32), addrspace 1)
G_STORE %23, %0 :: (volatile store (s32), addrspace 1)
G_STORE %24, %0 :: (volatile store (s32), addrspace 1)
...
---
name: icmp_s32_vv
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_vv
# GCN: [[VGPR2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
# GCN: [[VGPR3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
# GCN: V_CMP_NE_U32_e64 [[VGPR2]], [[VGPR3]]
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:vgpr(s32) = COPY $vgpr5
%5:vcc(s1) = G_ICMP intpred(ne), %1, %2
%6:vgpr(s32) = G_SELECT %5, %3, %4
G_STORE %6, %0 :: (store (s32), addrspace 1)
...
---
name: icmp_s32_vs
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_vs
# GCN: [[VGPR2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
# GCN: [[SGPR0:%[0-9]+]]:sreg_32 = COPY $sgpr0
# GCN: V_CMP_NE_U32_e64 [[VGPR2]], [[SGPR0]]
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $sgpr0
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:sgpr(s32) = COPY $sgpr0
%5:vcc(s1) = G_ICMP intpred(ne), %1, %4
%6:vgpr(s32) = G_SELECT %5, %2, %3
G_STORE %6, %0 :: (store (s32), addrspace 1)
...
---
name: icmp_s32_sv
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_sv
# GCN: [[VGPR2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
# GCN: [[SGPR0:%[0-9]+]]:sreg_32 = COPY $sgpr0
# GCN: V_CMP_NE_U32_e64 [[SGPR0]], [[VGPR2]]
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $sgpr0
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:sgpr(s32) = COPY $sgpr0
%5:vcc(s1) = G_ICMP intpred(ne), %4, %1
%6:vgpr(s32) = G_SELECT %5, %2, %3
G_STORE %6, %0 :: (store (s32), addrspace 1)
...
---
name: icmp_s32_or_vcc
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_s32_or_vcc
# GCN: [[VGPR2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
# GCN: [[SGPR0:%[0-9]+]]:sreg_32 = COPY $sgpr0
# GCN: V_CMP_NE_U32_e64 [[SGPR0]], [[VGPR2]]
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3, $vgpr4, $sgpr0
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(s32) = COPY $vgpr2
%2:vgpr(s32) = COPY $vgpr3
%3:vgpr(s32) = COPY $vgpr4
%4:sgpr(s32) = COPY $sgpr0
%5:vcc(s1) = G_ICMP intpred(ne), %4, %1
%6:vgpr(s32) = G_SELECT %5, %2, %3
G_STORE %6, %0 :: (store (s32), addrspace 1)
...
---
name: icmp_eq_ne_p3_ss
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_eq_ne_p3_ss
# GCN: S_CMP_EQ_U32 %0, %1, implicit-def $scc
# GCN: S_CMP_LG_U32 %0, %1, implicit-def $scc
body: |
bb.0:
liveins: $sgpr0, $sgpr1
%0:sgpr(p3) = COPY $sgpr0
%1:sgpr(p3) = COPY $sgpr1
%2:sgpr(s32) = G_ICMP intpred(eq), %0, %1
%3:sgpr(s32) = G_ICMP intpred(ne), %0, %1
S_ENDPGM 0, implicit %2, implicit %3
...
---
name: icmp_eq_ne_p3_vv
legalized: true
regBankSelected: true
# GCN-LABEL: name: icmp_eq_ne_p3_vv
# GCN: %2:[[VCCRC]] = V_CMP_EQ_U32_e64 %0, %1, implicit $exec
# GCN: %3:[[VCCRC]] = V_CMP_NE_U32_e64 %0, %1, implicit $exec
body: |
bb.0:
liveins: $vgpr0, $vgpr1
%0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
%2:vcc(s1) = G_ICMP intpred(eq), %0, %1
%3:vcc(s1) = G_ICMP intpred(ne), %0, %1
%4:vgpr(s1) = COPY %2
%5:vgpr(s1) = COPY %3
%6:vgpr(s32) = G_SEXT %4
%7:vgpr(s32) = G_SEXT %5
S_ENDPGM 0, implicit %6, implicit %7
...
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