3eb2281bc0
Previously SIFoldOperands::foldInstOperand would only fold a non-inlinable immediate into a single user, so as not to increase code size by adding the same 32-bit literal operand to many instructions. This patch removes that restriction, so that a non-inlinable immediate will be folded into any number of users. The rationale is: - It reduces the number of registers used for holding constant values, which might increase occupancy. (On the other hand, many of these registers are SGPRs which no longer affect occupancy on GFX10+.) - It reduces ALU stalls between the instruction that loads a constant into a register, and the instruction that uses it. - The above benefits are expected to outweigh any increase in code size. Differential Revision: https://reviews.llvm.org/D114643
32 lines
1.1 KiB
LLVM
32 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -o - %s | FileCheck %s
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; The OR instruction should not be eliminated by the "OR Combine" DAG optimization.
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; CHECK-LABEL: _Z11test_kernelPii:
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; CHECK: s_mul_i32
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; CHECK: s_sub_i32
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; CHECK: s_and_b32 [[S1:s[0-9]+]], {{s[0-9]+}}, 0xffff
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; CHECK: s_add_i32 [[S2:s[0-9]+]], {{s[0-9]+}}, [[S1]]
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; CHECK: s_or_b32 {{s[0-9]+}}, [[S2]], 0xc0
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define protected amdgpu_kernel void @_Z11test_kernelPii(i32 addrspace(1)* nocapture %Ad.coerce, i32 %s) local_unnamed_addr #5 {
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entry:
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%rem.lhs.trunc = trunc i32 %s to i16
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%rem4 = urem i16 %rem.lhs.trunc, 12
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%rem.zext = zext i16 %rem4 to i32
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%cmp = icmp eq i32 %s, 3
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%idxprom = zext i32 %s to i64
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%arrayidx3 = getelementptr inbounds i32, i32 addrspace(1)* %Ad.coerce, i64 %idxprom
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%div = lshr i32 %rem.zext, 3
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%or = or i32 %rem.zext, 192
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%add = add nuw nsw i32 %or, %div
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store i32 %add, i32 addrspace(1)* %arrayidx3, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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