0f1b5f115a
ptxas is a proprietary compiler from Nvidia that can compile PTX to machine code (SASS). It has a lot of diagnostics to catch errors in PTX, which can be used to verify PTX output from llc. Set -DPXTAS_EXECUTABLE=/path/to/ptxas CMake option to enable it. If this option is not set, then ptxas is substituted to true which effectively disables all ptxas RUN lines. LLVM_PTXAS_EXECUTABLE environment variable takes precedence over the CMake option, and allows to override ptxas executable that is used for LIT without complete re-configuration. Differential Revision: https://reviews.llvm.org/D121727
148 lines
6.3 KiB
LLVM
148 lines
6.3 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_80 | FileCheck %s -check-prefix=CHECK_PTX32
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_80 | FileCheck %s -check-prefix=CHECK_PTX64
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; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx -mcpu=sm_80 | %ptxas-verify -arch=sm_80 %}
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; RUN: %if ptxas-11.0 %{ llc < %s -march=nvptx64 -mcpu=sm_80 | %ptxas-verify -arch=sm_80 %}
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declare void @llvm.nvvm.mbarrier.init(i64* %a, i32 %b)
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declare void @llvm.nvvm.mbarrier.init.shared(i64 addrspace(3)* %a, i32 %b)
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; CHECK-LABEL: barrierinit
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define void @barrierinit(i64* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.init.b64 [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.init.b64 [%rd{{[0-9]+}}], %r{{[0-9]+}};
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tail call void @llvm.nvvm.mbarrier.init(i64* %a, i32 %b)
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ret void
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}
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; CHECK-LABEL: barrierinitshared
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define void @barrierinitshared(i64 addrspace(3)* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.init.shared.b64 [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.init.shared.b64 [%rd{{[0-9]+}}], %r{{[0-9]+}};
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tail call void @llvm.nvvm.mbarrier.init.shared(i64 addrspace(3)* %a, i32 %b)
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ret void
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}
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declare void @llvm.nvvm.mbarrier.inval(i64* %a)
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declare void @llvm.nvvm.mbarrier.inval.shared(i64 addrspace(3)* %a)
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; CHECK-LABEL: barrierinval
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define void @barrierinval(i64* %a) {
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; CHECK_PTX32: mbarrier.inval.b64 [%r{{[0-1]+}}];
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; CHECK_PTX64: mbarrier.inval.b64 [%rd{{[0-1]+}}];
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tail call void @llvm.nvvm.mbarrier.inval(i64* %a)
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ret void
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}
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; CHECK-LABEL: barrierinvalshared
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define void @barrierinvalshared(i64 addrspace(3)* %a) {
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; CHECK_PTX32: mbarrier.inval.shared.b64 [%r{{[0-1]+}}];
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; CHECK_PTX64: mbarrier.inval.shared.b64 [%rd{{[0-1]+}}];
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tail call void @llvm.nvvm.mbarrier.inval.shared(i64 addrspace(3)* %a)
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ret void
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}
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declare i64 @llvm.nvvm.mbarrier.arrive(i64* %a)
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declare i64 @llvm.nvvm.mbarrier.arrive.shared(i64 addrspace(3)* %a)
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; CHECK-LABEL: barrierarrive
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define void @barrierarrive(i64* %a) {
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; CHECK_PTX32: mbarrier.arrive.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}];
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; CHECK_PTX64: mbarrier.arrive.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}];
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive(i64* %a)
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ret void
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}
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; CHECK-LABEL: barrierarriveshared
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define void @barrierarriveshared(i64 addrspace(3)* %a) {
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; CHECK_PTX32: mbarrier.arrive.shared.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}];
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; CHECK_PTX64: mbarrier.arrive.shared.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}];
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.shared(i64 addrspace(3)* %a)
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ret void
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}
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declare i64 @llvm.nvvm.mbarrier.arrive.noComplete(i64* %a, i32 %b)
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declare i64 @llvm.nvvm.mbarrier.arrive.noComplete.shared(i64 addrspace(3)* %a, i32 %b)
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; CHECK-LABEL: barrierarrivenoComplete
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define void @barrierarrivenoComplete(i64* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.arrive.noComplete.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.arrive.noComplete.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}], %r{{[0-9]+}};
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.noComplete(i64* %a, i32 %b)
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ret void
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}
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; CHECK-LABEL: barrierarrivenoCompleteshared
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define void @barrierarrivenoCompleteshared(i64 addrspace(3)* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.arrive.noComplete.shared.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.arrive.noComplete.shared.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}], %r{{[0-9]+}};
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.noComplete.shared(i64 addrspace(3)* %a, i32 %b)
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ret void
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}
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declare i64 @llvm.nvvm.mbarrier.arrive.drop(i64* %a)
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declare i64 @llvm.nvvm.mbarrier.arrive.drop.shared(i64 addrspace(3)* %a)
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; CHECK-LABEL: barrierarrivedrop
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define void @barrierarrivedrop(i64* %a) {
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; CHECK_PTX32: mbarrier.arrive_drop.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}];
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; CHECK_PTX64: mbarrier.arrive_drop.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}];
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.drop(i64* %a)
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ret void
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}
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; CHECK-LABEL: barrierarrivedropshared
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define void @barrierarrivedropshared(i64 addrspace(3)* %a) {
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; CHECK_PTX32: mbarrier.arrive_drop.shared.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}];
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; CHECK_PTX64: mbarrier.arrive_drop.shared.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}];
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.drop.shared(i64 addrspace(3)* %a)
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ret void
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}
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declare i64 @llvm.nvvm.mbarrier.arrive.drop.noComplete(i64* %a, i32 %b)
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declare i64 @llvm.nvvm.mbarrier.arrive.drop.noComplete.shared(i64 addrspace(3)* %a, i32 %b)
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; CHECK-LABEL: barrierarrivedropnoComplete
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define void @barrierarrivedropnoComplete(i64* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.arrive_drop.noComplete.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.arrive_drop.noComplete.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}], %r{{[0-9]+}};
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.drop.noComplete(i64* %a, i32 %b)
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ret void
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}
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; CHECK-LABEL: barrierarrivedropnoCompleteshared
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define void @barrierarrivedropnoCompleteshared(i64 addrspace(3)* %a, i32 %b) {
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; CHECK_PTX32: mbarrier.arrive_drop.noComplete.shared.b64 %rd{{[0-9]+}}, [%r{{[0-9]+}}], %r{{[0-9]+}};
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; CHECK_PTX64: mbarrier.arrive_drop.noComplete.shared.b64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}], %r{{[0-9]+}};
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%ret = tail call i64 @llvm.nvvm.mbarrier.arrive.drop.noComplete.shared(i64 addrspace(3)* %a, i32 %b)
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ret void
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}
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declare i1 @llvm.nvvm.mbarrier.test.wait(i64* %a, i64 %b)
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declare i1 @llvm.nvvm.mbarrier.test.wait.shared(i64 addrspace(3)* %a, i64 %b)
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; CHECK-LABEL: barriertestwait
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define void @barriertestwait(i64* %a, i64 %b) {
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; CHECK_PTX32: mbarrier.test_wait.b64 %p{{[0-9]+}}, [%r{{[0-9]+}}], %rd{{[0-9]+}};
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; CHECK_PTX64: mbarrier.test_wait.b64 %p{{[0-9]+}}, [%rd{{[0-9]+}}], %rd{{[0-9]+}};
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%ret = tail call i1 @llvm.nvvm.mbarrier.test.wait(i64* %a, i64 %b)
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ret void
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}
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; CHECK-LABEL: barriertestwaitshared
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define void @barriertestwaitshared(i64 addrspace(3)* %a, i64 %b) {
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; CHECK_PTX32: mbarrier.test_wait.shared.b64 %p{{[0-9]+}}, [%r{{[0-9]+}}], %rd{{[0-9]+}};
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; CHECK_PTX64: mbarrier.test_wait.shared.b64 %p{{[0-9]+}}, [%rd{{[0-9]+}}], %rd{{[0-9]+}};
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%ret = tail call i1 @llvm.nvvm.mbarrier.test.wait.shared(i64 addrspace(3)* %a, i64 %b)
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ret void
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}
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declare i32 @llvm.nvvm.mbarrier.pending.count(i64 %b)
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; CHECK-LABEL: barrierpendingcount
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define i32 @barrierpendingcount(i64* %a, i64 %b) {
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; CHECK_PTX32: mbarrier.pending_count.b64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK_PTX64: mbarrier.pending_count.b64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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%ret = tail call i32 @llvm.nvvm.mbarrier.pending.count(i64 %b)
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ret i32 %ret
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}
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