9e97b2a477
https://alive2.llvm.org/ce/z/A_auBq Remove limitation that wouldn't perform the fold if all the inverted bits are known zero The thumb2 changes look to be benign, although it does show that the TEQ/TST isel patterns could probably be improved. Fixes movmsk regression in D122754 Differential Revision: https://reviews.llvm.org/D123023
131 lines
4.6 KiB
LLVM
131 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s
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; rdar://7226797
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; LLVM should omit the testl and use the flags result from the orl.
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define void @or(float* %A, i32 %IA, i32 %N) nounwind {
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; CHECK-LABEL: or:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: andl $3, %edx
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; CHECK-NEXT: xorl $1, %ecx
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; CHECK-NEXT: orl %edx, %ecx
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; CHECK-NEXT: je .LBB0_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl $0, (%eax)
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; CHECK-NEXT: .LBB0_2: # %return
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; CHECK-NEXT: retl
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entry:
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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%3 = or i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* %A, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
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; CHECK-LABEL: xor:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andl $3, %ecx
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; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: cmpl $1, %ecx
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; CHECK-NEXT: je .LBB1_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl $0, (%eax)
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; CHECK-NEXT: .LBB1_2: # %return
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; CHECK-NEXT: retl
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entry:
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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%3 = xor i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* %A, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
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; CHECK-LABEL: and:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: xorl $1, %eax
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; CHECK-NEXT: andl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: andl $3, %eax
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; CHECK-NEXT: movb %al, (%ecx)
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; CHECK-NEXT: je .LBB2_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl $0, 0
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; CHECK-NEXT: .LBB2_2: # %return
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; CHECK-NEXT: retl
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entry:
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store i8 0, i8* %p
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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%3 = and i32 %2, %1 ; <i32> [#uses=1]
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%t = trunc i32 %3 to i8
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store i8 %t, i8* %p
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* null, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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; Just like @and, but without the trunc+store. This should use a testb
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; instead of an andl.
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define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movb $0, (%ecx)
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; CHECK-NEXT: xorl $1, %eax
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; CHECK-NEXT: andl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: testb $3, %al
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; CHECK-NEXT: je .LBB3_2
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; CHECK-NEXT: # %bb.1: # %bb
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; CHECK-NEXT: movl $0, 0
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; CHECK-NEXT: .LBB3_2: # %return
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; CHECK-NEXT: retl
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entry:
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store i8 0, i8* %p
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%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
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%1 = and i32 %0, 3 ; <i32> [#uses=1]
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%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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%3 = and i32 %2, %1 ; <i32> [#uses=1]
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%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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store float 0.000000e+00, float* null, align 4
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ret void
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return: ; preds = %entry
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ret void
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}
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