92c645b5c1
In InnerLoopVectorizer::getOrCreateVectorTripCount there is an assert that the known minimum value for the VF is a power of 2 when tail-folding is enabled. However, for scalable vectors the value of vscale may not be a power of 2, which means we have to worry about the possibility of overflow. I have solved this problem by adding preheader checks that prevent us from entering the vector body if the canonical IV would overflow, i.e. if ((IntMax - TripCount) < (VF * UF)) ... skip vector loop ... Differential Revision: https://reviews.llvm.org/D125235
66 lines
3.3 KiB
LLVM
66 lines
3.3 KiB
LLVM
; RUN: opt -S -loop-vectorize < %s | FileCheck %s
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; These tests ensure that tail-folding is enabled when the predicate.enable
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; loop attribute is set to true.
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target triple = "aarch64-unknown-linux-gnu"
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define void @simple_memset(i32 %val, i32* %ptr, i64 %n) #0 {
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; CHECK-LABEL: @simple_memset(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N:%.*]], i64 1)
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4
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; CHECK-NEXT: [[TMP2:%.*]] = sub i64 -1, [[UMAX]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i64 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: br i1 [[TMP3]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP4]], 4
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; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP7:%.*]] = mul i64 [[TMP6]], 4
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; CHECK-NEXT: [[TMP8:%.*]] = sub i64 [[TMP7]], 1
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; CHECK-NEXT: [[N_RND_UP:%.*]] = add i64 [[UMAX]], [[TMP8]]
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], [[TMP5]]
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]]
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[VAL:%.*]], i32 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX1:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT2:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX1]], 0
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; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i64(i64 [[TMP9]], i64 [[UMAX]])
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 [[TMP9]]
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i32, i32* [[TMP10]], i32 0
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; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP11]] to <vscale x 4 x i32>*
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; CHECK-NEXT: call void @llvm.masked.store.nxv4i32.p0nxv4i32(<vscale x 4 x i32> [[BROADCAST_SPLAT]], <vscale x 4 x i32>* [[TMP12]], i32 4, <vscale x 4 x i1> [[ACTIVE_LANE_MASK]])
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; CHECK-NEXT: [[TMP13:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP14:%.*]] = mul i64 [[TMP13]], 4
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; CHECK-NEXT: [[INDEX_NEXT2]] = add i64 [[INDEX1]], [[TMP14]]
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; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT2]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: br i1 true, label [[WHILE_END_LOOPEXIT:%.*]], label [[SCALAR_PH]]
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;
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entry:
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br label %while.body
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while.body: ; preds = %while.body, %entry
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%index = phi i64 [ %index.next, %while.body ], [ 0, %entry ]
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%gep = getelementptr i32, i32* %ptr, i64 %index
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store i32 %val, i32* %gep
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%index.next = add nsw i64 %index, 1
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%cmp10 = icmp ult i64 %index.next, %n
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br i1 %cmp10, label %while.body, label %while.end.loopexit, !llvm.loop !0
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while.end.loopexit: ; preds = %while.body
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ret void
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}
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attributes #0 = { "target-features"="+sve" }
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!0 = distinct !{!0, !1}
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!1 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
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