2ac5ebedea
SLP vectorizer emits extracts for externally used vectorized scalars and estimates the cost for each such extract. But in many cases these scalars are input for insertelement instructions, forming buildvector, and instead of extractelement/insertelement pair we can emit/cost estimate shuffle(s) cost and generate series of shuffles, which can be further optimized. Tested using test-suite (+SPEC2017), the tests passed, SLP was able to generate/vectorize more instructions in many cases and it allowed to reduce number of re-vectorization attempts (where we could try to vectorize buildector insertelements again and again). Differential Revision: https://reviews.llvm.org/D107966
89 lines
3.9 KiB
LLVM
89 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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define void @b() {
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; CHECK-LABEL: @b(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> poison, float 0x7FF8000000000000, i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> <float 0xFFF8000000000000, float 0xFFF8000000000000, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 5, i32 3>
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; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float 0x7FF8000000000000, i32 3
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; CHECK-NEXT: [[TMP3:%.*]] = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> [[TMP2]], <4 x float> zeroinitializer, <4 x float> zeroinitializer)
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; CHECK-NEXT: [[TMP4:%.*]] = fmul <4 x float> [[TMP3]], <float undef, float undef, float undef, float 2.000000e+00>
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; CHECK-NEXT: [[TMP5:%.*]] = fdiv <4 x float> [[TMP4]], zeroinitializer
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; CHECK-NEXT: store <4 x float> [[TMP5]], ptr undef, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%mul = fmul float undef, 2.000000e+00
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%i = tail call float @llvm.fmuladd.f32(float %mul, float 0.000000e+00, float 0.000000e+00)
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%mul2 = fmul float undef, %i
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%add = fadd float undef, 1.000000e+00
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%neg = fneg float %add
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%i1 = tail call float @llvm.fmuladd.f32(float %neg, float 0.000000e+00, float 0.000000e+00)
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%mul4 = fmul float undef, %i1
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%neg7 = fneg float %mul
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%i2 = tail call float @llvm.fmuladd.f32(float %neg7, float 0.000000e+00, float 0.000000e+00)
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%mul8 = fmul float undef, %i2
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%i3 = tail call float @llvm.fmuladd.f32(float %add, float 0.000000e+00, float 0.000000e+00)
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%mul11 = fmul float %i3, 2.000000e+00
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%div = fdiv float %mul2, 0.000000e+00
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store float %div, ptr undef, align 4
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%div12 = fdiv float %mul4, 0.000000e+00
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%arrayidx13 = getelementptr inbounds float, ptr undef, i64 1
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store float %div12, ptr %arrayidx13, align 4
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%div14 = fdiv float %mul8, 0.000000e+00
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%arrayidx15 = getelementptr inbounds float, ptr undef, i64 2
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store float %div14, ptr %arrayidx15, align 4
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%div16 = fdiv float %mul11, 0.000000e+00
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%arrayidx17 = getelementptr inbounds float, ptr undef, i64 3
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store float %div16, ptr %arrayidx17, align 4
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ret void
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}
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declare float @llvm.fmuladd.f32(float, float, float)
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define void @test(float %a) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x float> poison, float [[A:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x float> [[TMP0]], float [[A]], i32 1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <2 x float> zeroinitializer, [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <2 x i32> zeroinitializer
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; CHECK-NEXT: br label [[LOOP]]
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;
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entry:
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br label %loop
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loop:
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%add.i157 = fadd float 0.000000e+00, %a
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%add23.i = fadd float 0.000000e+00, %a
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%insert = insertelement <2 x float> zeroinitializer, float %add.i157, i64 0
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%insert.i = insertelement <2 x float> %insert, float %add23.i, i64 1
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%agg = insertelement <2 x float> %insert.i, float %add.i157, i64 1
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br label %loop
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}
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define internal void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[DOTSROA_025_4_VEC_INSERT_US_I:%.*]] = insertelement <2 x float> zeroinitializer, float 0.000000e+00, i64 0
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; CHECK-NEXT: br label [[LOOP]]
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;
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entry:
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br label %loop
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loop:
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%0 = fadd float 0.000000e+00, 0.000000e+00
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%1 = fadd float 0.000000e+00, 0.000000e+00
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%2 = fadd float %0, 0.000000e+00
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%3 = fadd float %1, 0.000000e+00
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%.sroa.3.8.vec.insert.i.us.i = insertelement <2 x float> zeroinitializer, float %2, i64 0
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%.sroa.3.12.vec.insert.i.us.i = insertelement <2 x float> %.sroa.3.8.vec.insert.i.us.i, float %3, i64 1
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%.sroa.025.4.vec.insert.us.i = insertelement <2 x float> %.sroa.3.12.vec.insert.i.us.i, float %0, i64 0
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br label %loop
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}
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