2ac5ebedea
SLP vectorizer emits extracts for externally used vectorized scalars and estimates the cost for each such extract. But in many cases these scalars are input for insertelement instructions, forming buildvector, and instead of extractelement/insertelement pair we can emit/cost estimate shuffle(s) cost and generate series of shuffles, which can be further optimized. Tested using test-suite (+SPEC2017), the tests passed, SLP was able to generate/vectorize more instructions in many cases and it allowed to reduce number of re-vectorization attempts (where we could try to vectorize buildector insertelements again and again). Differential Revision: https://reviews.llvm.org/D107966
87 lines
5.2 KiB
LLVM
87 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -slp-vectorizer -mcpu=skx -S -o - -mtriple=x86_64-unknown < %s | FileCheck %s
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define void @test(double* %0, double %1) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, double* [[TMP0:%.*]], i32 6
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; CHECK-NEXT: br label [[TMP4:%.*]]
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; CHECK: 4:
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; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP1:%.*]], i32 1
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; CHECK-NEXT: br label [[TMP6:%.*]]
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; CHECK: 6:
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; CHECK-NEXT: [[TMP7:%.*]] = load double, double* null, align 8
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> <double 0.000000e+00, double poison>, double [[TMP7]], i32 1
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; CHECK-NEXT: [[TMP9:%.*]] = fcmp olt <2 x double> [[TMP5]], [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = select <2 x i1> [[TMP9]], <2 x double> zeroinitializer, <2 x double> zeroinitializer
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; CHECK-NEXT: [[TMP11:%.*]] = fmul <2 x double> [[TMP10]], zeroinitializer
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; CHECK-NEXT: [[TMP12:%.*]] = fadd <2 x double> zeroinitializer, [[TMP11]]
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; CHECK-NEXT: [[TMP13:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
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; CHECK-NEXT: store <2 x double> [[TMP12]], <2 x double>* [[TMP13]], align 8
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; CHECK-NEXT: br label [[TMP6]]
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;
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%3 = getelementptr inbounds double, double* %0, i32 6
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%4 = getelementptr inbounds double, double* %0, i32 7
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br label %5
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5: ; preds = %2
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br label %6
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6: ; preds = %6, %5
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%7 = load double, double* null, align 8
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%8 = fcmp olt double 0.000000e+00, 0.000000e+00
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%9 = select i1 %8, double 0.000000e+00, double 0.000000e+00
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%10 = fcmp ogt double %7, %1
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%11 = select i1 %10, double 0.000000e+00, double 0.000000e+00
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%12 = fmul double %9, 0.000000e+00
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%13 = fmul double 0.000000e+00, %11
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%14 = fadd double 0.000000e+00, %12
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store double %14, double* %3, align 8
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%15 = fadd double 0.000000e+00, %13
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store double %15, double* %4, align 8
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br label %6
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}
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define { <2 x float>, <2 x float> } @test1(i32 %conv.i32.i.i.i) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV_I32_I_I_I1:%.*]] = fptosi float 0.000000e+00 to i32
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 poison, i32 0>, i32 [[CONV_I32_I_I_I:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[CONV_I32_I_I_I1]], i32 2
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; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <4 x i32> [[TMP1]], zeroinitializer
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <4 x i32> [[TMP1]], zeroinitializer
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i1> [[TMP2]], <4 x i1> [[TMP3]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
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; CHECK-NEXT: [[TMP5:%.*]] = select <4 x i1> [[TMP4]], <4 x float> zeroinitializer, <4 x float> zeroinitializer
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[TMP5]], zeroinitializer
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; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x float> [[TMP6]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
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; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <2 x float> zeroinitializer, <2 x float> [[TMP7]], <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP6]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <2 x float> zeroinitializer, <2 x float> [[TMP9]], <2 x i32> <i32 2, i32 3>
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; CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue { <2 x float>, <2 x float> } zeroinitializer, <2 x float> [[TMP8]], 0
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; CHECK-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue { <2 x float>, <2 x float> } [[DOTFCA_0_INSERT]], <2 x float> [[TMP10]], 1
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; CHECK-NEXT: ret { <2 x float>, <2 x float> } zeroinitializer
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;
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entry:
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%cmp.i.i.i.i.i = icmp slt i32 0, 0
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%cond.i.i.i.i = select i1 %cmp.i.i.i.i.i, float 0.000000e+00, float 0.000000e+00
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%conv.i32.i.i.i1 = fptosi float 0.000000e+00 to i32
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%cmp.i.i34.i.i.i = icmp slt i32 %conv.i32.i.i.i1, 0
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%cond.i35.i.i.i = select i1 %cmp.i.i34.i.i.i, float 0.000000e+00, float 0.000000e+00
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%cmp.i.i38.i.i.i = icmp sgt i32 0, 0
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%cond.i39.i.i.i = select i1 %cmp.i.i38.i.i.i, float 0.000000e+00, float 0.000000e+00
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%cmp.i.i42.i.i.i = icmp sgt i32 %conv.i32.i.i.i, 0
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%cond.i43.i.i.i = select i1 %cmp.i.i42.i.i.i, float 0.000000e+00, float 0.000000e+00
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%add.i.i = fadd float 0.000000e+00, 0.000000e+00
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%add4.i.i = fadd float 0.000000e+00, 0.000000e+00
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%add.i9.i = fadd float %cond.i43.i.i.i, %add.i.i
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%retval.sroa.0.0.vec.insert4 = insertelement <2 x float> zeroinitializer, float %add.i9.i, i64 0
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%add4.i12.i = fadd float %cond.i39.i.i.i, %add4.i.i
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%retval.sroa.0.4.vec.insert7 = insertelement <2 x float> %retval.sroa.0.0.vec.insert4, float %add4.i12.i, i64 1
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%add.i15.i = fadd float %cond.i35.i.i.i, %add.i.i
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%retval.sroa.7.8.vec.insert11 = insertelement <2 x float> zeroinitializer, float %add.i15.i, i64 0
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%add4.i18.i = fadd float %cond.i.i.i.i, %add4.i.i
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%retval.sroa.7.12.vec.insert13 = insertelement <2 x float> %retval.sroa.7.8.vec.insert11, float %add4.i18.i, i64 1
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%.fca.0.insert = insertvalue { <2 x float>, <2 x float> } zeroinitializer, <2 x float> %retval.sroa.0.4.vec.insert7, 0
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%.fca.1.insert = insertvalue { <2 x float>, <2 x float> } %.fca.0.insert, <2 x float> %retval.sroa.7.12.vec.insert13, 1
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ret { <2 x float>, <2 x float> } zeroinitializer
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}
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