2ac5ebedea
SLP vectorizer emits extracts for externally used vectorized scalars and estimates the cost for each such extract. But in many cases these scalars are input for insertelement instructions, forming buildvector, and instead of extractelement/insertelement pair we can emit/cost estimate shuffle(s) cost and generate series of shuffles, which can be further optimized. Tested using test-suite (+SPEC2017), the tests passed, SLP was able to generate/vectorize more instructions in many cases and it allowed to reduce number of re-vectorization attempts (where we could try to vectorize buildector insertelements again and again). Differential Revision: https://reviews.llvm.org/D107966
60 lines
3.6 KiB
LLVM
60 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basic-aa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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%struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334 = type { %struct._CLzmaProps.0.27.54.81.102.123.144.165.180.195.228.258.333, i16*, i8*, i8*, i32, i32, i64, i64, i32, i32, i32, [4 x i32], i32, i32, i32, i32, i32, [20 x i8] }
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%struct._CLzmaProps.0.27.54.81.102.123.144.165.180.195.228.258.333 = type { i32, i32, i32, i32 }
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define fastcc void @LzmaDec_DecodeReal2(%struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334* %p) {
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; CHECK-LABEL: @LzmaDec_DecodeReal2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RANGE20_I:%.*]] = getelementptr inbounds [[STRUCT_CLZMADEC_1_28_55_82_103_124_145_166_181_196_229_259_334:%.*]], %struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334* [[P:%.*]], i64 0, i32 4
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; CHECK-NEXT: br label [[DO_BODY66_I:%.*]]
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; CHECK: do.body66.i:
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; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ [[TMP3:%.*]], [[DO_COND_I:%.*]] ], [ undef, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> undef, <2 x i32> undef, <2 x i32> [[TMP0]]
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; CHECK-NEXT: br i1 undef, label [[DO_COND_I]], label [[IF_ELSE_I:%.*]]
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; CHECK: if.else.i:
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; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i32> [[TMP1]], undef
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; CHECK-NEXT: br label [[DO_COND_I]]
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; CHECK: do.cond.i:
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; CHECK-NEXT: [[TMP3]] = phi <2 x i32> [ [[TMP2]], [[IF_ELSE_I]] ], [ [[TMP1]], [[DO_BODY66_I]] ]
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; CHECK-NEXT: br i1 undef, label [[DO_BODY66_I]], label [[DO_END1006_I:%.*]]
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; CHECK: do.end1006.i:
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; CHECK-NEXT: [[TMP4:%.*]] = select <2 x i1> undef, <2 x i32> undef, <2 x i32> [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[RANGE20_I]] to <2 x i32>*
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; CHECK-NEXT: store <2 x i32> [[TMP4]], <2 x i32>* [[TMP5]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%range20.i = getelementptr inbounds %struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334, %struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334* %p, i64 0, i32 4
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%code21.i = getelementptr inbounds %struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334, %struct.CLzmaDec.1.28.55.82.103.124.145.166.181.196.229.259.334* %p, i64 0, i32 5
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br label %do.body66.i
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do.body66.i: ; preds = %do.cond.i, %entry
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%range.2.i = phi i32 [ %range.4.i, %do.cond.i ], [ undef, %entry ]
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%code.2.i = phi i32 [ %code.4.i, %do.cond.i ], [ undef, %entry ]
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%.range.2.i = select i1 undef, i32 undef, i32 %range.2.i
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%.code.2.i = select i1 undef, i32 undef, i32 %code.2.i
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br i1 undef, label %do.cond.i, label %if.else.i
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if.else.i: ; preds = %do.body66.i
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%sub91.i = sub i32 %.range.2.i, undef
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%sub92.i = sub i32 %.code.2.i, undef
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br label %do.cond.i
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do.cond.i: ; preds = %if.else.i, %do.body66.i
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%range.4.i = phi i32 [ %sub91.i, %if.else.i ], [ undef, %do.body66.i ]
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%code.4.i = phi i32 [ %sub92.i, %if.else.i ], [ %.code.2.i, %do.body66.i ]
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br i1 undef, label %do.body66.i, label %do.end1006.i
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do.end1006.i: ; preds = %do.cond.i
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%.range.4.i = select i1 undef, i32 undef, i32 %range.4.i
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%.code.4.i = select i1 undef, i32 undef, i32 %code.4.i
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store i32 %.range.4.i, i32* %range20.i, align 4
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store i32 %.code.4.i, i32* %code21.i, align 4
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ret void
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}
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