1ca772ed95
This changes adds the option to lower to NvGpu dialect ops during the VectorToGPU convsersion pass. Because this transformation reuses existing VectorToGPU logic, a seperate VectorToNvGpu conversion pass is not created. The option `use-nvgpu` is added to the VectorToGPU pass. When this is true, the pass will attempt to convert slices rooted at `vector.contract` operations into `nvgpu.mma.sync` ops, and `vector.transfer_read` ops are converted to either `nvgpu.ldmatrix` or one or more `vector.load` operations. The specific data loaded will depend on the thread id within a subgroup (warp). These index calculations depend on data type and shape of the MMA op according to the downstream PTX specification. The code for supporting these details is separated into `NvGpuSupport.cpp|h`. Differential Revision: https://reviews.llvm.org/D122940
116 lines
2.1 KiB
C++
116 lines
2.1 KiB
C++
//===- PassDetail.h - Conversion Pass class details -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef CONVERSION_PASSDETAIL_H_
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#define CONVERSION_PASSDETAIL_H_
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#include "mlir/Pass/Pass.h"
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#include "mlir/Conversion/GPUToROCDL/Runtimes.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/FunctionInterfaces.h"
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namespace mlir {
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class AffineDialect;
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// Forward declaration from Dialect.h
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template <typename ConcreteDialect>
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void registerDialect(DialectRegistry ®istry);
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namespace acc {
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class OpenACCDialect;
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} // namespace acc
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namespace arith {
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class ArithmeticDialect;
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} // namespace arith
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namespace cf {
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class ControlFlowDialect;
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} // namespace cf
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namespace complex {
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class ComplexDialect;
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} // namespace complex
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namespace gpu {
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class GPUDialect;
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class GPUModuleOp;
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} // namespace gpu
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namespace func {
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class FuncDialect;
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} // namespace func
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namespace linalg {
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class LinalgDialect;
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} // namespace linalg
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namespace LLVM {
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class LLVMDialect;
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} // namespace LLVM
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namespace nvgpu {
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class NVGPUDialect;
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}
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namespace NVVM {
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class NVVMDialect;
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} // namespace NVVM
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namespace math {
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class MathDialect;
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} // namespace math
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namespace memref {
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class MemRefDialect;
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} // namespace memref
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namespace omp {
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class OpenMPDialect;
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} // namespace omp
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namespace pdl_interp {
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class PDLInterpDialect;
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} // namespace pdl_interp
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namespace ROCDL {
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class ROCDLDialect;
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} // namespace ROCDL
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namespace scf {
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class SCFDialect;
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} // namespace scf
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namespace spirv {
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class SPIRVDialect;
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} // namespace spirv
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namespace tensor {
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class TensorDialect;
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} // namespace tensor
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namespace tosa {
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class TosaDialect;
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} // namespace tosa
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namespace vector {
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class VectorDialect;
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} // namespace vector
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namespace arm_neon {
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class ArmNeonDialect;
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} // namespace arm_neon
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#define GEN_PASS_CLASSES
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#include "mlir/Conversion/Passes.h.inc"
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} // namespace mlir
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#endif // CONVERSION_PASSDETAIL_H_
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