Florian Hahn 4ad0fdd163 [VPlan] Remove reverse() of predecessors from VPInstruction::generate. ...

This was originally done to reduce the diff for the change. Remove it
and update the remaining tests. NFC modulo reordering of incoming
values.

Clean up after https://github.com/llvm/llvm-project/pull/114292.

2024-12-17 20:44:32 +00:00

..

exit-branch-cost.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

interleave_IC.ll

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interleaved-pointer-runtime-check-unprofitable.ll

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large-loop-rdx.ll

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lit.local.cfg

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massv-altivec.ll

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massv-calls.ll

[Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclibs (#113637)

2024-11-08 16:07:38 -08:00

massv-nobuiltin.ll

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massv-unsupported.ll

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optimal-epilog-vectorization-profitability.ll

[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)

2024-11-17 19:35:32 +00:00

optimal-epilog-vectorization.ll

[VPlan] Remove reverse() of predecessors from VPInstruction::generate.

2024-12-17 20:44:32 +00:00

pr30990.ll

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pr41179.ll

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predcost.ll

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reg-usage.ll

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small-loop-rdx.ll

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stride-vectorization.ll

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vectorize-bswap.ll

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vectorize-force-tail-with-evl.ll

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vectorize-only-for-real.ll

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vplan-force-tail-with-evl.ll

[VPlan] Modernize VPWidenIntOrFpInductionRecipe printing (NFC).

2024-12-15 20:46:52 +00:00

vsx-tsvc-s173.ll

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widened-massv-call.ll

[VPlan] Propagate all GEP flags (#119899)

2024-12-17 13:48:50 +01:00

widened-massv-vfabi-attr.ll

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