18db29ea6f
In some situations, the compiler may insert an accumulator prime instruction and an accumulator unprime instruction with no use of that accumulator between the two. That's for example the case when we store an accumulator after assembling it or restoring it. This patch adds a peephole to remove these prime and unprime instructions. Differential Revision: https://reviews.llvm.org/D91386
227 lines
8.3 KiB
LLVM
227 lines
8.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s --check-prefix=LE-PAIRED
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=BE-PAIRED
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@f = common local_unnamed_addr global <512 x i1> zeroinitializer, align 16
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@g = common local_unnamed_addr global <256 x i1> zeroinitializer, align 16
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define void @testLdSt(i64 %SrcIdx, i64 %DstIdx) {
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; LE-PAIRED-LABEL: testLdSt:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: plxv vs1, f@PCREL+96(0), 1
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; LE-PAIRED-NEXT: plxv vs0, f@PCREL+112(0), 1
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; LE-PAIRED-NEXT: plxv vs3, f@PCREL+64(0), 1
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; LE-PAIRED-NEXT: plxv vs2, f@PCREL+80(0), 1
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; LE-PAIRED-NEXT: pstxv vs0, f@PCREL+176(0), 1
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; LE-PAIRED-NEXT: pstxv vs1, f@PCREL+160(0), 1
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; LE-PAIRED-NEXT: pstxv vs2, f@PCREL+144(0), 1
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; LE-PAIRED-NEXT: pstxv vs3, f@PCREL+128(0), 1
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testLdSt:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r3, r2, .LC0@toc@ha
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; BE-PAIRED-NEXT: ld r3, .LC0@toc@l(r3)
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; BE-PAIRED-NEXT: lxv vs1, 80(r3)
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; BE-PAIRED-NEXT: lxv vs0, 64(r3)
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; BE-PAIRED-NEXT: lxv vs3, 112(r3)
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; BE-PAIRED-NEXT: lxv vs2, 96(r3)
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; BE-PAIRED-NEXT: stxv vs1, 144(r3)
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; BE-PAIRED-NEXT: stxv vs0, 128(r3)
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; BE-PAIRED-NEXT: stxv vs3, 176(r3)
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; BE-PAIRED-NEXT: stxv vs2, 160(r3)
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; BE-PAIRED-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds <512 x i1>, <512 x i1>* @f, i64 1
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%0 = load <512 x i1>, <512 x i1>* %arrayidx, align 64
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%arrayidx1 = getelementptr inbounds <512 x i1>, <512 x i1>* @f, i64 2
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store <512 x i1> %0, <512 x i1>* %arrayidx1, align 64
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ret void
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}
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define void @testXLdSt(i64 %SrcIdx, i64 %DstIdx) {
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; LE-PAIRED-LABEL: testXLdSt:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: sldi r3, r3, 6
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; LE-PAIRED-NEXT: paddi r5, 0, f@PCREL, 1
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; LE-PAIRED-NEXT: add r6, r5, r3
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; LE-PAIRED-NEXT: lxv vs1, 32(r6)
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; LE-PAIRED-NEXT: lxv vs0, 48(r6)
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; LE-PAIRED-NEXT: lxvx vs3, r5, r3
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; LE-PAIRED-NEXT: lxv vs2, 16(r6)
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; LE-PAIRED-NEXT: sldi r3, r4, 6
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; LE-PAIRED-NEXT: stxvx vs3, r5, r3
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; LE-PAIRED-NEXT: add r3, r5, r3
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; LE-PAIRED-NEXT: stxv vs0, 48(r3)
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; LE-PAIRED-NEXT: stxv vs1, 32(r3)
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; LE-PAIRED-NEXT: stxv vs2, 16(r3)
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testXLdSt:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r5, r2, .LC0@toc@ha
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; BE-PAIRED-NEXT: sldi r3, r3, 6
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; BE-PAIRED-NEXT: ld r5, .LC0@toc@l(r5)
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; BE-PAIRED-NEXT: add r6, r5, r3
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; BE-PAIRED-NEXT: lxvx vs0, r5, r3
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; BE-PAIRED-NEXT: sldi r3, r4, 6
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; BE-PAIRED-NEXT: lxv vs1, 16(r6)
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; BE-PAIRED-NEXT: lxv vs3, 48(r6)
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; BE-PAIRED-NEXT: lxv vs2, 32(r6)
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; BE-PAIRED-NEXT: stxvx vs0, r5, r3
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; BE-PAIRED-NEXT: add r3, r5, r3
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; BE-PAIRED-NEXT: stxv vs1, 16(r3)
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; BE-PAIRED-NEXT: stxv vs3, 48(r3)
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; BE-PAIRED-NEXT: stxv vs2, 32(r3)
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; BE-PAIRED-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds <512 x i1>, <512 x i1>* @f, i64 %SrcIdx
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%0 = load <512 x i1>, <512 x i1>* %arrayidx, align 64
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%arrayidx1 = getelementptr inbounds <512 x i1>, <512 x i1>* @f, i64 %DstIdx
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store <512 x i1> %0, <512 x i1>* %arrayidx1, align 64
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ret void
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}
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define void @testUnalignedLdSt() {
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; LE-PAIRED-LABEL: testUnalignedLdSt:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: plxv vs1, f@PCREL+43(0), 1
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; LE-PAIRED-NEXT: plxv vs0, f@PCREL+59(0), 1
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; LE-PAIRED-NEXT: plxv vs3, f@PCREL+11(0), 1
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; LE-PAIRED-NEXT: plxv vs2, f@PCREL+27(0), 1
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; LE-PAIRED-NEXT: pstxv vs0, f@PCREL+67(0), 1
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; LE-PAIRED-NEXT: pstxv vs1, f@PCREL+51(0), 1
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; LE-PAIRED-NEXT: pstxv vs2, f@PCREL+35(0), 1
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; LE-PAIRED-NEXT: pstxv vs3, f@PCREL+19(0), 1
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testUnalignedLdSt:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r3, r2, .LC0@toc@ha
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; BE-PAIRED-NEXT: li r4, 11
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; BE-PAIRED-NEXT: ld r3, .LC0@toc@l(r3)
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; BE-PAIRED-NEXT: lxvx vs0, r3, r4
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; BE-PAIRED-NEXT: li r4, 27
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; BE-PAIRED-NEXT: lxvx vs1, r3, r4
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; BE-PAIRED-NEXT: li r4, 43
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; BE-PAIRED-NEXT: lxvx vs2, r3, r4
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; BE-PAIRED-NEXT: li r4, 59
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; BE-PAIRED-NEXT: lxvx vs3, r3, r4
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; BE-PAIRED-NEXT: li r4, 35
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; BE-PAIRED-NEXT: stxvx vs1, r3, r4
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; BE-PAIRED-NEXT: li r4, 19
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; BE-PAIRED-NEXT: stxvx vs0, r3, r4
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; BE-PAIRED-NEXT: li r4, 67
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; BE-PAIRED-NEXT: stxvx vs3, r3, r4
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; BE-PAIRED-NEXT: li r4, 51
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; BE-PAIRED-NEXT: stxvx vs2, r3, r4
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; BE-PAIRED-NEXT: blr
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entry:
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%0 = bitcast <512 x i1>* @f to i8*
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%add.ptr = getelementptr inbounds i8, i8* %0, i64 11
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%add.ptr1 = getelementptr inbounds i8, i8* %0, i64 19
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%1 = bitcast i8* %add.ptr to <512 x i1>*
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%2 = bitcast i8* %add.ptr1 to <512 x i1>*
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%3 = load <512 x i1>, <512 x i1>* %1, align 64
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store <512 x i1> %3, <512 x i1>* %2, align 64
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ret void
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}
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define void @testLdStPair(i64 %SrcIdx, i64 %DstIdx) {
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; LE-PAIRED-LABEL: testLdStPair:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: plxv vs1, g@PCREL+32(0), 1
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; LE-PAIRED-NEXT: plxv vs0, g@PCREL+48(0), 1
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; LE-PAIRED-NEXT: pstxv vs1, g@PCREL+64(0), 1
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; LE-PAIRED-NEXT: pstxv vs0, g@PCREL+80(0), 1
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testLdStPair:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r3, r2, .LC1@toc@ha
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; BE-PAIRED-NEXT: ld r3, .LC1@toc@l(r3)
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; BE-PAIRED-NEXT: lxv vs1, 48(r3)
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; BE-PAIRED-NEXT: lxv vs0, 32(r3)
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; BE-PAIRED-NEXT: stxv vs1, 80(r3)
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; BE-PAIRED-NEXT: stxv vs0, 64(r3)
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; BE-PAIRED-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds <256 x i1>, <256 x i1>* @g, i64 1
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%0 = load <256 x i1>, <256 x i1>* %arrayidx, align 64
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%arrayidx1 = getelementptr inbounds <256 x i1>, <256 x i1>* @g, i64 2
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store <256 x i1> %0, <256 x i1>* %arrayidx1, align 64
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ret void
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}
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define void @testXLdStPair(i64 %SrcIdx, i64 %DstIdx) {
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; LE-PAIRED-LABEL: testXLdStPair:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: sldi r3, r3, 5
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; LE-PAIRED-NEXT: paddi r5, 0, g@PCREL, 1
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; LE-PAIRED-NEXT: add r6, r5, r3
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; LE-PAIRED-NEXT: lxvx vs1, r5, r3
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; LE-PAIRED-NEXT: sldi r3, r4, 5
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; LE-PAIRED-NEXT: lxv vs0, 16(r6)
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; LE-PAIRED-NEXT: add r4, r5, r3
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; LE-PAIRED-NEXT: stxvx vs1, r5, r3
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; LE-PAIRED-NEXT: stxv vs0, 16(r4)
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testXLdStPair:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r5, r2, .LC1@toc@ha
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; BE-PAIRED-NEXT: sldi r3, r3, 5
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; BE-PAIRED-NEXT: ld r5, .LC1@toc@l(r5)
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; BE-PAIRED-NEXT: add r6, r5, r3
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; BE-PAIRED-NEXT: lxvx vs0, r5, r3
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; BE-PAIRED-NEXT: sldi r3, r4, 5
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; BE-PAIRED-NEXT: lxv vs1, 16(r6)
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; BE-PAIRED-NEXT: add r4, r5, r3
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; BE-PAIRED-NEXT: stxvx vs0, r5, r3
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; BE-PAIRED-NEXT: stxv vs1, 16(r4)
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; BE-PAIRED-NEXT: blr
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entry:
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%arrayidx = getelementptr inbounds <256 x i1>, <256 x i1>* @g, i64 %SrcIdx
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%0 = load <256 x i1>, <256 x i1>* %arrayidx, align 64
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%arrayidx1 = getelementptr inbounds <256 x i1>, <256 x i1>* @g, i64 %DstIdx
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store <256 x i1> %0, <256 x i1>* %arrayidx1, align 64
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ret void
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}
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define void @testUnalignedLdStPair() {
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; LE-PAIRED-LABEL: testUnalignedLdStPair:
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; LE-PAIRED: # %bb.0: # %entry
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; LE-PAIRED-NEXT: plxv vs1, g@PCREL+11(0), 1
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; LE-PAIRED-NEXT: plxv vs0, g@PCREL+27(0), 1
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; LE-PAIRED-NEXT: pstxv vs1, g@PCREL+19(0), 1
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; LE-PAIRED-NEXT: pstxv vs0, g@PCREL+35(0), 1
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; LE-PAIRED-NEXT: blr
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;
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; BE-PAIRED-LABEL: testUnalignedLdStPair:
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; BE-PAIRED: # %bb.0: # %entry
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; BE-PAIRED-NEXT: addis r3, r2, .LC1@toc@ha
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; BE-PAIRED-NEXT: li r4, 11
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; BE-PAIRED-NEXT: ld r3, .LC1@toc@l(r3)
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; BE-PAIRED-NEXT: lxvx vs0, r3, r4
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; BE-PAIRED-NEXT: li r4, 27
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; BE-PAIRED-NEXT: lxvx vs1, r3, r4
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; BE-PAIRED-NEXT: li r4, 35
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; BE-PAIRED-NEXT: stxvx vs1, r3, r4
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; BE-PAIRED-NEXT: li r4, 19
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; BE-PAIRED-NEXT: stxvx vs0, r3, r4
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; BE-PAIRED-NEXT: blr
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entry:
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%0 = bitcast <256 x i1>* @g to i8*
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%add.ptr = getelementptr inbounds i8, i8* %0, i64 11
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%add.ptr1 = getelementptr inbounds i8, i8* %0, i64 19
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%1 = bitcast i8* %add.ptr to <256 x i1>*
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%2 = bitcast i8* %add.ptr1 to <256 x i1>*
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%3 = load <256 x i1>, <256 x i1>* %1, align 64
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store <256 x i1> %3, <256 x i1>* %2, align 64
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ret void
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}
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